EPM9560RI208-10 vs EPM9560RI208-15N Comparison
Detailed side-by-side comparison of EPM9560RI208-10 by Intel and EPM9560RI208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RI208-10 | EPM9560RI208-15N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $67.80 | $19.45 |
| Family | MAX 9000 | β |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | 12,000 | β |
| Macrocells | 560 | β |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | β |
| Pin-to-Pin Delay (tPD) | 10 ns | β |
| Maximum Counter Frequency | 144 MHz | β |
| Supply Voltage (VCCINT) | 5.0 V | β |
| User I/O Pins | 212 (typical for 208-RQFP package) | β |
| Package | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Ruggedized Quad Flat Pack) |
| Mounting Type | Surface Mount | β |
| Operating Temperature | -40 Β°C to +85 Β°C (Industrial) | 0C to 70C (Commercial) |
| Programming Interface | IEEE 1149.1 (JTAG) / ISP | IEEE 1149.1 JTAG, 5.0-V in-system |
| Configuration Memory | EEPROM, 100 erase/program cycles | CMOS EEPROM, in-system programmable |
| RoHS Status | ROHS3 Compliant | [DATA_NEEDED: RoHS status] |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) | β |
| Lead Time | 1-7 days (per fpgalink listing) | β |
| Manufacturer | β | Altera (Intel Programmable Solutions Group) |
| Device Family | β | MAX 9000 |
| Architecture | β | Multiple Array MatriX (MAX), 3rd generation |
| Total Pins | β | 356 (per third-party catalog; see _validation_note) |
| Package Pin Count | β | 208 |
| Terminal Form | β | Gull Wing |
| Package Code | β | HFQFP |
| User I/Os | β | 216 (per DigiChip specification; see _validation_note) |
| Maximum Internal Frequency | β | 145 MHz |
| Propagation Delay (tPD) | β | 11.4 ns (15 ns speed grade) |
| Speed Grade | β | -15 |
| Supply Voltage | β | 5.0 V |
| Temperature Grade | β | Industrial (per Vyrian/Partstack listings) |
| Logic Family | β | CMOS |