EPM9560RI240-15 vs EPM9560SRC240-15 Comparison

Detailed side-by-side comparison of EPM9560RI240-15 by Intel and EPM9560SRC240-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560RI240-15 EPM9560SRC240-15
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $23.10 $22.50
Product Type EE PLD (Electrically Erasable Programmable Logic Device) β€”
Family MAX 9000 MAX 9000
Macrocells 560 212
Flip-Flops 772 β€”
User I/Os (industrial grade) 191 β€”
Dedicated Inputs 4 β€”
Propagation Delay (tPD) 15 ns (speed grade -15) β€”
Internal Frequency (max) 145 MHz β€”
Logic Family / Process CMOS, EEPROM-based β€”
Core Voltage 5.0 V β€”
I/O Voltage 3.3 V or 5.0 V (configurable) β€”
Architecture Multiple Array MatriX (MAX), 3rd generation β€”
Package RQFP-240 (Power Quad Flat Pack, gull-wing, 0.500 mm pitch) RQFP-240 (Surface Mount)
Mounting Type Surface Mount Surface Mount
Operating Temperature -40 C to +85 C (industrial) [DATA_NEEDED: commercial 0-70C or industrial -40-85C]
In-System Programmability Yes, JTAG (IEEE Std 1149.1) β€”
Power-Up Configuration Instant-on (no external boot PROM) β€”
I/O Undershoot Tolerance -2.0 V for <20 ns (no-load) β€”
I/O Overshoot Tolerance 7.0 V for <20 ns (no-load) β€”
Device Type β€” EPLD / CPLD (Complex Programmable Logic Device)
Usable Gates β€” 560
Logic Array Blocks (LABs) β€” 16
Maximum User I/O Pins β€” [DATA_NEEDED: exact I/O count for SRC240 package]
Speed Grade β€” -15 (15 ns tPD)
Pin-to-Pin Logic Delay (tPD) β€” 15 ns (max)
Supply Voltage (VCC) β€” 5 V (nominal)
Programmability β€” In-system programmable via IEEE 1149.1 JTAG
Non-volatile β€” Yes (EPROM/EEPROM cells)
RoHS Status β€” [DATA_NEEDED: RoHS compliance not stated in provided data]
Process Technology β€” CMOS EPROM

Datasheets & Resources

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