EPM9560RI240-15 - 560-Macrocell MAX 9000 CPLD, 15ns, RQFP-240 | Intel
MPN: EPM9560RI240-15 ✗ End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $38.5 | $38.50 |
| 10 | $34.2 | $342.00 |
| 100 | $29.95 | $2,995.00 |
| 500 | $26.5 | $13,250.00 |
| 1,000 | $23.1 | $23,100.00 |
EPM9560RI240-15 Overview
A CPLD (Complex Programmable Logic Device) is a non-volatile, instant-on programmable logic device that combines multiple PLA-like logic array blocks (LABs) connected through a programmable interconnect matrix (PIA). Within the broader taxonomy, the EPM9560RI240-15 sits in this hierarchy: programmable logic device -> CPLD -> EEPROM-based CPLD -> MAX architecture CPLD -> high-density (>500 macrocell) CPLD. Compared to FPGAs, CPLDs offer deterministic timing, no configuration load time, and superior pin-locking and I/O count for glue-logic, bus-interface, and state-machine applications.
The EPM9560RI240-15 provides 191 user I/O pins (industrial version) with 4 dedicated inputs, JTAG-compliant in-system programmability via IEEE Std 1149.1, and a 5.0 V core with multi-voltage I/O. Each macrocell supports combinatorial or registered logic with programmable polarity, a D/T/JK/SR flip-flop, and a product-term-based local feedback path. The 240-pin RQFP package is a surface-mount gull-wing variant with a 0.500 mm terminal pitch.
Typical applications include industrial automation controllers, telecommunications line cards, peripheral bus interface bridges, legacy peripheral glue logic, and consumer electronics requiring deterministic sub-25 ns logic response. Designers favor the MAX 9000 series for power-up instant-on behavior (no external boot PROM required), making it ideal for systems that must begin operation immediately after VCC is applied.
When designing, ensure monotonic VCC rise per Altera's Operating Requirements; during transitions I/O pins may undershoot to -2.0 V or overshoot to 7.0 V for periods shorter than 20 ns under no-load conditions. A robust decoupling network (one 0.1 uF per VCC/ground pair, plus bulk) is required to keep internal frequency up to 145 MHz. Industrial-grade operation is supported from -40 C to +85 C.
This page synthesizes distributor pricing, drop-in alternatives from the same MAX 9000 family, and practical design notes not found on a single manufacturer product page, giving engineers a single decision-ready reference for sourcing, replacement, and design-in decisions.
Drop-in alternatives for EPM9560RI240-15 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with EPM9560RI240-15 (same form factor and footprint) — differing in Package, Device Type, Pin-to-Pin Propagation Delay, In-System Programmability, Logic Family.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
EPM9560RI240-10
✅ Drop-In✓ In Stock
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View Datasheet →EPM9560RI240-20
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View Datasheet →EPM9560RC240-15
✅ Drop-In✓ In Stock
$174.72 / Unit
View Datasheet →EPM9480RI240-15
✅ Drop-In📋 Reference alternative (not in catalog)
EPM9560ARI240-10
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View Datasheet →EPM9560ARC240-10
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$28.8 / Unit
View Datasheet →EPM9560RI240-15 Maximum Ratings & Electrical Characteristics
| Product Type | EE PLD (Electrically Erasable Programmable Logic Device) |
| Family | MAX 9000 |
| Macrocells | 560 |
| Flip-Flops | 772 |
| User I/Os (industrial grade) | 191 |
| Dedicated Inputs | 4 |
| Propagation Delay (tPD) | 15 ns (speed grade -15) |
| Internal Frequency (max) | 145 MHz |
| Logic Family / Process | CMOS, EEPROM-based |
| Core Voltage | 5.0 V |
| I/O Voltage | 3.3 V or 5.0 V (configurable) |
| Architecture | Multiple Array MatriX (MAX), 3rd generation |
| Package | RQFP-240 (Power Quad Flat Pack, gull-wing, 0.500 mm pitch) |
| Mounting Type | Surface Mount |
| Operating Temperature | -40 C to +85 C (industrial) |
| In-System Programmability | Yes, JTAG (IEEE Std 1149.1) |
| Power-Up Configuration | Instant-on (no external boot PROM) |
| I/O Undershoot Tolerance | -2.0 V for <20 ns (no-load) |
| I/O Overshoot Tolerance | 7.0 V for <20 ns (no-load) |
EPM9560RI240-15 rqfp-240 (power quad flat pack, gull-wing, 0.500 mm pitch) Pin Configuration Guide
Pin configuration for EPM9560RI240-15 (rqfp-240 (power quad flat pack, gull-wing, 0.500 mm pitch) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for EPM9560RI240-15.
Refer to the datasheet for full pin configuration.
Typical Applications
EPM9560RI240-15 is suitable for 6 applications: Industrial Automation Controllers, Telecommunications Line Cards, Legacy Peripheral Bus Bridge, Peripheral Glue Logic Replacement, Consumer Electronics Control Logic, Military / Aerospace Legacy Systems.
Industrial Automation Controllers
The EPM9560RI240-15 is well suited to industrial automation controllers, where 560 macrocells provide ample capacity for combinational and sequential glue logic, state machines, and peripheral decoders. The 15 ns tPD and 145 MHz internal frequency support deterministic response in motor-control, sensor-fusion, and PLC backplane designs. Industrial -40 C to +85 C operation tolerates factory floor environments, and the 191 user I/Os allow direct connection to many sensors, optoisolators, and actuator drivers without external buffer ICs.
Recommended
Telecommunications Line Cards
In telecommunications line cards, the EPM9560RI240-15 provides the timing-critical glue logic, bus arbitration, and protocol conversion functions that ASICs and ASSPs cannot economically cover. The 5 ns-pin-to-pin combinational delay budget and 191 I/Os allow direct interfacing with T1/E1 framers, framers, and TDM switches. The instant-on non-volatile EEPROM configuration eliminates boot-PROM complexity, an important advantage when line-card slot count runs into the hundreds.
Recommended
Legacy Peripheral Bus Bridge
The EPM9560RI240-15 is a strong fit for legacy peripheral bus bridge designs, such as ISA-to-PCI bridges, SCSI termination controllers, and VMEbus interface logic, where 560 macrocells provide generous headroom for state machines and address decoders. The 15 ns propagation delay aligns with 33 MHz PCI timing budgets. The dual 3.3 V/5.0 V I/O ring enables direct connection to legacy 5 V peripherals and modern 3.3 V ASICs on the same board without external level shifters.
Recommended
Peripheral Glue Logic Replacement
The EPM9560RI240-15 can replace 5 to 10 discrete PAL/GAL devices in a typical glue-logic design, simplifying board layout, reducing BOM cost, and improving testability. Each macrocell supports D, T, JK, or SR flip-flops, so the part can absorb the entire address decoder, chip-select generator, and wait-state logic in one device. The 191 I/Os match the count of typical 22V10 plus 16V8 plus discrete logic replacements without I/O starvation.
Recommended
Consumer Electronics Control Logic
The EPM9560RI240-15 is a good choice for consumer electronics control logic such as set-top box front panels, A/V receiver display controllers, and printer engine controllers. Its 145 MHz internal frequency supports video-mode timing generation, and the 191 I/Os allow direct key-matrix scanning and LED multiplexing. JTAG in-system programming enables last-minute firmware updates during manufacturing without re-flowing the part.
Recommended
Military / Aerospace Legacy Systems
The EPM9560RI240-15 is found in many long-life military and aerospace systems where redesign is cost-prohibitive. The industrial -40 C to +85 C rating covers most MIL-STD-810 environmental profiles, and the EEPROM-based non-volatile configuration provides instant-on operation critical to avionics and defense applications. Long-term obsolescence management programs maintain second-source supply through brokers, but new designs should not adopt this part for new platforms.
Recommended
Recommended Products Summary
Engineering reference data for EPM9560RI240-15 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | EPM9560RI240-10 | EPM9560RI240-20 | EPM9560RC240-15 | EPM9480RI240-15 | EPM9560ARI240-10 | EPM9560ARC240-10 |
|---|---|---|---|---|---|---|---|
| Brand | Intel | Intel | Intel | Intel | Intel | Intel | Intel |
| Package | RQFP-240 | RQFP-240 - same | RQFP-240 - same | RQFP-240 - same | RQFP-240 - same | RQFP-240 - same | RQFP-240 - same |
| Macrocells | 560 | 560 | 560 | 560 | 480 (-14%) | 560 | 560 |
| Propagation Delay (tPD) | 15 ns | 10 ns (faster) | 20 ns (slower) | 15 ns | 15 ns | 10 ns (faster) | 10 ns (faster) |
| Operating Temperature | -40 C to +85 C (industrial) | -40 C to +85 C | -40 C to +85 C | 0 C to +70 C (commercial) | -40 C to +85 C | -40 C to +85 C | 0 C to +70 C (commercial) |
| Lifecycle Status | Obsolete | Obsolete | Obsolete | Obsolete | Obsolete | Obsolete | Obsolete |
| Param Match | 100% (self) | 100% | 90% | 90% | 90% | 100% | 90% |
Key Differentiators
- Industrial temperature range for harsh environments (vs EPM9560RC240-15)
- Mid-tier speed grade for power/timing balance (vs EPM9560RI240-20)
- Higher macrocell density than EPM9480 family (vs EPM9480RI240-15)
Design Notes
Estimated: at 145 MHz internal frequency, the EPM9560RI240-15 can draw 200-400 mA from the 5.0 V core supply depending on toggle rate and I/O loading. Place one 0.1 uF X7R ceramic decoupling capacitor within 3 mm of every VCC/ground pair, plus a 10 uF tantalum bulk capacitor near the package. Monotonic VCC rise per Altera's Operating Requirements is mandatory - use a MAX809-style reset supervisor or RC delay if your power-on ramp can stall or sag.
The 240-pin RQFP uses a 0.500 mm gull-wing lead pitch on a 32 mm x 32 mm body. Use a 4-layer PCB with continuous power and ground planes directly under the device for return-path integrity. Route all four dedicated inputs (IN1-IN4) with 50 ohm controlled impedance, and place series termination resistors within 5 mm of the CPLD pin when driving long transmission lines. Keep JTAG signals (TDI, TDO, TMS, TCK) away from clock and high-speed I/O to avoid programming interference.
Do not exceed the I/O undershoot specification of -2.0 V for periods shorter than 20 ns (no-load) or the overshoot specification of 7.0 V for the same duration. Add external clamping diodes if your application drives inductive loads. Also, when migrating between speed grades (-10, -15, -20), remember to update the Quartus project speed-grade setting, otherwise timing analysis will be pessimistic. Finally, confirm VCCIO voltage level (3.3 V or 5.0 V) is stable before JTAG programming.
Compliance Information
RoHS and lead-free status depend on date-code and lot. Abacus Technologies documents REACH compliance for the equivalent EPM9560RI240-20. Request a Certificate of Compliance (CoC) from your distributor before designing in for RoHS-bound applications.
