EPM9560RI240-20 vs EPM9560RI240-15 Comparison
Detailed side-by-side comparison of EPM9560RI240-20 by Altera and EPM9560RI240-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RI240-15 - 560-Macrocell MAX 9000 CPLD, 15ns, RQFP-240 | Intel
EPM9560RI240-15 ObsoleteSpecification Comparison
| Parameter | EPM9560RI240-20 | EPM9560RI240-15 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $23.10 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Macrocells | 560 | 560 |
| User I/O Pins | 191 | β |
| Pin-to-Pin Propagation Delay | 20 ns | β |
| Supply Voltage | 5.0 V | β |
| Configuration Technology | CMOS EEPROM (non-volatile) | β |
| In-System Programmability | Yes (ISP) | Yes, JTAG (IEEE Std 1149.1) |
| Package | 240-pin RQFP (PowerQuad II) with exposed pad | RQFP-240 (Power Quad Flat Pack, gull-wing, 0.500 mm pitch) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Range | Industrial (-40C to +85C) | β |
| Logic Gates | 10,000 | β |
| Internal Frequency | [DATA_NEEDED: internal frequency] | β |
| Number of Logic Array Blocks | [DATA_NEEDED: number of logic array blocks] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | β |
| REACH Status | Compliant (per Abacus Technologies listing) | β |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Packaging | Tray | β |
| Product Type | β | EE PLD (Electrically Erasable Programmable Logic Device) |
| Flip-Flops | β | 772 |
| User I/Os (industrial grade) | β | 191 |
| Dedicated Inputs | β | 4 |
| Propagation Delay (tPD) | β | 15 ns (speed grade -15) |
| Internal Frequency (max) | β | 145 MHz |
| Logic Family / Process | β | CMOS, EEPROM-based |
| Core Voltage | β | 5.0 V |
| I/O Voltage | β | 3.3 V or 5.0 V (configurable) |
| Architecture | β | Multiple Array MatriX (MAX), 3rd generation |
| Operating Temperature | β | -40 C to +85 C (industrial) |
| Power-Up Configuration | β | Instant-on (no external boot PROM) |
| I/O Undershoot Tolerance | β | -2.0 V for <20 ns (no-load) |
| I/O Overshoot Tolerance | β | 7.0 V for <20 ns (no-load) |