EPM9560WC208-20 vs EPM9560RC208-20C Comparison

Detailed side-by-side comparison of EPM9560WC208-20 by Altera and EPM9560RC208-20C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560WC208-20 EPM9560RC208-20C
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $25.80 $0.00
Family MAX 9000 MAX 9000
Device Type CPLD (EPLD) EEPROM-based CPLD (EE PLD)
Macrocells 560 560
Logic Array Blocks (LABs) 35 β€”
User I/O Pins 149 β€”
Maximum Propagation Delay (tPD) 23.6 ns β€”
Package PQFP-208 (RQFP/WQFP) 208-pin RQFP (Power Quad Flat Pack)
Process Technology CMOS, EEPROM-based β€”
Supply Voltage (VCCINT) 5 V (typical, see datasheet) β€”
I/O Voltage (VCCIO) 3.3 V or 5 V (multi-voltage I/O) β€”
In-System Programmability Yes, JTAG BST (IEEE 1149.1) Yes, via IEEE Std. 1149.1 JTAG
Pin/Package Suffix W = power PQFP; -20 = 23.6 ns speed grade β€”
Operating Temperature Commercial (0C to +70C) [DATA_NEEDED: exact temp grade] β€”
Mounting Type Surface Mount Surface Mount
RoHS Status Non-compliant (legacy PQFP) [DATA_NEEDED: confirm from official doc] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED] β€”
Halogen-Free [DATA_NEEDED] β€”
MSL Level [DATA_NEEDED] β€”
Usable Gates β€” 12,000
Flip-Flops β€” 772
Configurable I/O Lines β€” 149
Propagation Delay (tPD) β€” 20 ns (speed grade -20)
Maximum Frequency β€” 100 MHz
Supply Voltage β€” 5.0 V
I/O Voltage Support β€” 3.3 V or 5 V
Configuration Memory β€” EEPROM (non-volatile)
JESD-30 Package Code β€” S-PQFP-G208
Terminal Form β€” Gull Wing
Operating Temperature Grade β€” Commercial (0C to +70C)
Technology β€” CMOS

Datasheets & Resources

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