Altera

EPM9560WC208-20 - 560-Macrocell CPLD, 23.6ns, PQFP-208 | Intel/Altera

Name: EPM9560WC208-20 - 560-Macrocell CPLD, 23.6ns, PQFP-208 | Intel/Altera
Brand: Altera
SKU: EPM9560WC208-20
Price: 25.8 USD
Availability: InStock

MPN: EPM9560WC208-20 ✗ End of Life

In Stock Ships in 1-3 business days

5 V (typical, see datasheet) Vdss PQFP-208 (RQFP/WQFP) Package

From $25.8 USD / Unit

MOQ: 1 |

Price updated: 2026-09-13

Volume Pricing

Qty	Unit Price	Extended
1	$42.5	$42.50
10	$38.2	$382.00
100	$33.95	$3,395.00
500	$29.4	$14,700.00
1,000	$25.8	$25,800.00

ℹ️ All prices are in USD

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EPM9560WC208-20 Overview

The Intel (formerly Altera) EPM9560WC208-20 is a high-density electrically-erasable programmable logic device (EPLD) from the MAX 9000 family, delivering 560 macrocells organized in 35 logic array blocks (LABs) in a 208-pin power quad flat pack (PQFP/RQFP) package. The device is a CMOS, in-system-programmable complex PLD with a maximum propagation delay of approximately 23.6 ns (the “-20” speed grade) and supports operation with both 3.3 V and 5 V I/O signaling for flexible mixed-voltage system design.

A CPLD (Complex Programmable Logic Device) is a non-volatile reconfigurable digital IC built from an array of AND/OR macrocell structures backed by EEPROM or flash memory; it occupies the design hierarchy between simple PLDs (PAL/GAL) and FPGAs, providing deterministic timing, fast I/O response, and instant-on behavior without external boot memory. Within Altera’s MAX 9000 family the EPM9560 sits at the top of the 9000 series density range, with 149 usable I/O pins and a programmable interconnect that makes it well suited to bus decoding, address mapping, glue-logic and state-machine replacement in industrial and telecom systems.

Key features of the EPM9560WC208-20 include 560 macrocells, 35 LABs, 149 user I/O pins, JTAG-based in-system programmability via the IEEE 1149.1 boundary-scan test (BST) interface, dual 3.3 V/5 V I/O capability, and a programmable register/feedback architecture. The “W” suffix designates the power PQFP package with enhanced thermal characteristics for high-density designs, and the “-20” designator indicates a 23.6 ns pin-to-pin logic delay suitable for systems clocked up to roughly 40 MHz on combinational paths.

Architecturally the device uses an EEPROM-based macrocell with individually programmable product-term steering, D/T/JK flip-flops, and a global interconnect matrix that delivers predictable, deterministic timing independent of routing density. This makes timing closure straightforward for address decoding, interrupt steering, and synchronous state-machine designs where FPGAs would add unnecessary silicon cost and configuration overhead.

Typical applications include high-density bus and address decoding in microprocessor/microcontroller systems, peripheral interface glue logic (e.g., PCI/ISA bus bridges), state-machine and sequencer replacement, industrial control logic, telecom backplane glue logic, and JTAG-driven system monitoring. The 149 I/O pins allow large pin-count designs to be consolidated into a single PLD.

When designing with this device, always observe the maximum I/O count (149), respect the dual-voltage VCCIO/VCCINT power sequencing rules, and use the Quartus II or MAX+PLUS II toolchain for design entry, fitting, and JTAG programming. Decoupling caps (0.1 microfarad ceramic in parallel with 10 microfarad bulk) should be placed within 1 cm of each supply pin to maintain signal integrity during in-system programming cycles.

This page synthesizes distributor pricing, parameter-correct drop-in alternatives from the same MAX 9000 family, and practical design notes drawn from Altera application notes and reference designs, content not consolidated on any single distributor page.

Drop-in alternatives for EPM9560WC208-20 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.

Variants in this series

Same-series models that are drop-in compatible with EPM9560WC208-20 (same form factor and footprint) — differing in Package, Device Type, Process Technology, Operating Temperature Grade, RoHS Status.

EPM9560RC208-20

Intel

Package: 208-pin RQFP (28x28 mm)