EPM9560WC208 vs EPM9560WC208-20 Comparison

Detailed side-by-side comparison of EPM9560WC208 by Altera and EPM9560WC208-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9560WC208-20

EPM9560WC208-20 - 560-Macrocell CPLD, 23.6ns, PQFP-208 | Intel/Altera

EPM9560WC208-20 Obsolete

Specification Comparison

Parameter EPM9560WC208 EPM9560WC208-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $125.00 $25.80
Family MAX 9000 MAX 9000
Device Type EE Programmable Logic Device (CPLD) CPLD (EPLD)
Macrocells 560 560
Logic Array Blocks (LABs) 35 35
Flip-Flops 772 β€”
Maximum User I/O 149 β€”
Maximum Clock Frequency 117.6 MHz β€”
Propagation Delay (tpd, -15 grade) 16.6 ns β€”
Supply Voltage 3.3 V or 5 V β€”
Process Technology CMOS, electrically erasable CMOS, EEPROM-based
Package 208-pin CQFP (Ceramic Quad Flat Pack) PQFP-208 (RQFP/WQFP)
Terminal Pitch 0.50 mm β€”
Mounting Type Surface Mount Surface Mount
Programming Interface IEEE 1149.1 JTAG β€”
Configuration Memory Non-volatile EE (instant-on) β€”
Hot Socketing Support Yes β€”
MSL Level [DATA_NEEDED: MSL level] [DATA_NEEDED]
RoHS Status [DATA_NEEDED: RoHS compliance] Non-compliant (legacy PQFP) [DATA_NEEDED: confirm from official doc]
User I/O Pins β€” 149
Maximum Propagation Delay (tPD) β€” 23.6 ns
Supply Voltage (VCCINT) β€” 5 V (typical, see datasheet)
I/O Voltage (VCCIO) β€” 3.3 V or 5 V (multi-voltage I/O)
In-System Programmability β€” Yes, JTAG BST (IEEE 1149.1)
Pin/Package Suffix β€” W = power PQFP; -20 = 23.6 ns speed grade
Operating Temperature β€” Commercial (0C to +70C) [DATA_NEEDED: exact temp grade]
Lead-Free β€” [DATA_NEEDED]
Halogen-Free β€” [DATA_NEEDED]

Datasheets & Resources

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