XC3090L-8PC84BKJ vs XC3090LTM-8PC84C Comparison
Detailed side-by-side comparison of XC3090L-8PC84BKJ by Xilinx and XC3090LTM-8PC84C by Xilinx. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Xilinx
XC3090L-8PC84BKJ
XC3090L-8PC84BKJ - XC3000L 5V FPGA 84-Pin PLCC | AMD Xilinx
XC3090L-8PC84BKJ ObsoleteXilinx
XC3090LTM-8PC84C
XC3090LTM-8PC84C - XC3000L FPGA, 6K Gates, 84-PLCC | Xilinx
XC3090LTM-8PC84C ObsoleteSpecification Comparison
| Parameter | XC3090L-8PC84BKJ | XC3090LTM-8PC84C |
|---|---|---|
| Brand | Xilinx | Xilinx |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $19.20 | $43.25 |
| Family | XC3000L Low-Voltage Logic Cell Array | XC3000L Low Voltage Logic Cell Array |
| Logic Cells | 320 | β |
| Usable Gates | 6,000 | β |
| Configuration Memory | 64,160 bits | 64,160 bits (distributed SRAM) |
| Maximum User I/O | 144 | β |
| Supply Voltage (Vcc) | 3.0 V to 3.6 V (low-voltage) | β |
| Speed Grade | -8 (approx. 70 MHz toggle) | -8 (per suffix; see device decoder) |
| Process Technology | 5 ns CMOS SRAM | 0.8 um CMOS SRAM-based |
| Configuration Method | Serial/parallel SRAM, in-system reconfigurable | External EEPROM/EPROM/ROM/master/microprocessor mode |
| Boundary Scan | IEEE 1149.1 (JTAG) compliant | β |
| Package | 84-pin PLCC (J-Lead), windowed ceramic (BKJ) | 84-Pin Plastic Leaded Chip Carrier (PLCC, J-Lead) |
| Operating Temperature | 0C to +70C (commercial, C suffix) | -40 C to +85 C (industrial, TM suffix typically commercial/industrial) |
| Mounting Type | Through-hole (PLCC socket) | Surface Mount (PLCC socket-compatible) |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| RoHS Status | unknown - legacy windowed ceramic package | unknown |
| Configuration Pins | M0, M1, M2 mode-select + DIN, DOUT, CCLK, INIT | β |
| Logic Cells / Gates | β | ~6,000 usable gates |
| Configurable Logic Blocks (CLBs) | β | 320 |
| Core Supply Voltage | β | 3.0 V to 3.6 V (3.3 V typical) |
| Pin Count | β | 84 |
| Maximum Toggle Frequency | β | [DATA_NEEDED: specific fmax value] |
| Logic Block Delays | β | [DATA_NEEDED: typical TBU/TPIO delay] |
| I/O Standard Support | β | TTL/CMOS 3.3 V (5 V tolerant with restrictions) |
| Lead-Free | β | unknown |
| Programming Toolchain | β | XACT / Foundation (legacy, EOL software) |