2EDL5013U2DXTMA1 - 120V Half-Bridge Gate Driver | Infineon
MPN: 2EDL5013U2DXTMA1 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $1.85 | $1.85 |
| 10 | $1.62 | $16.20 |
| 100 | $1.38 | $138.00 |
| 500 | $1.18 | $590.00 |
| 1,000 | $0.98 | $980.00 |
| 2,500 | $0.85 | $2,125.00 |
2EDL5013U2DXTMA1 Overview
A half-bridge gate driver is a power-management IC that converts low-current PWM logic signals into the high peak currents required to rapidly charge and discharge the gate capacitance of power MOSFETs. It belongs to the broader category of gate driver ICs (sub-category: half-bridge / bootstrap drivers) within the power MOSFET driver segment of power management semiconductors. Half-bridge drivers are foundational building blocks for synchronous buck converters, half-bridge and full-bridge converters, motor drives, and Class D audio amplifiers, where one device must drive two MOSFETs in a push-pull arrangement with strict dead-time control to prevent shoot-through.
Key features include 3 A peak source and 3 A peak sink gate drive capability, 120 V maximum bootstrap voltage rating, integrated bootstrap diode, typical rise time of 4.4 ns and fall time of 3.5 ns, under-voltage lockout (UVLO) for both VCC and VBS rails, and a 7 A active Miller clamp to prevent parasitic turn-on of the low-side MOSFET. The PG-TSNP-12-5 (12-pin Thin Small Non-leaded Package, 5 mm x 5 mm outline) offers excellent thermal performance and a low-inductance lead frame, critical for high di/dt switching transitions. Typical quiescent current is in the sub-milliamp range, minimizing losses in standby operation.
Architecturally, the 2EDL5013U2D uses a level-shifter to translate the low-side PWM input to the high-side floating supply domain, an integrated bootstrap diode that replaces the discrete external diode and resistor traditionally required, and matched propagation delay between high-side and low-side channels to simplify dead-time compensation. The non-inverting logic ensures that the gate follows the input directly, which simplifies firmware on the controller side.
Typical applications include telecom 48 V point-of-load converters, server and data-center VRM stages, industrial DC-DC converters, solar micro-inverters, and motor-drive half-bridges. The 120 V boot rating comfortably covers 48 V bus rails and most telecom input transients. When laying out the PCB, keep the bootstrap capacitor close to the BST and SW pins to minimize voltage ringing, and provide a 4.7 uF to 10 uF ceramic VCC bypass capacitor directly at the supply pin. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for 2EDL5013U2DXTMA1 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with 2EDL5013U2DXTMA1 (same form factor and footprint) — differing in Package, Driver Configuration, Driver Type, Input Logic Compatibility, RoHS Status.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
2EDL5023U2DXTMA1
✅ Drop-In✓ In Stock
$1.4 / Unit
View Datasheet →2EDL8033G4CXTMA1
✅ Drop-In✓ In Stock
$2.84 / Unit
View Datasheet →2EDL8034G4CXTMA1
✅ Drop-In✓ In Stock
$1.55 / Unit
View Datasheet →2EDB7259KXUMA1
✅ Drop-In✓ In Stock
$1.22 / Unit
View Datasheet →IRS2110SPBF
✅ Drop-In✓ In Stock
$0.72 / Unit
View Datasheet →IR2109SPBF
✅ Drop-In✓ In Stock
$1.05 / Unit
View Datasheet →2EDL5013U2DXTMA1 Maximum Ratings & Electrical Characteristics
| Driver Configuration | High-Side, Low-Side (Half-Bridge) |
| Input Logic | Non-Inverting |
| Number of Channels | 2 |
| Peak Source Current | 3 A |
| Peak Sink Current | 3 A |
| Output Configuration | Non-Inverting |
| Supply Voltage (VCC) | 4.5 V to 5.5 V |
| Bootstrap Voltage Rating | 120 V max |
| Rise Time (typ.) | 4.4 ns |
| Fall Time (typ.) | 3.5 ns |
| Miller Clamp | 7 A active Miller clamp |
| Bootstrap Diode | Integrated |
| UVLO | VCC and VBS under-voltage lockout |
| Operating Temperature Range | -40C to +125C |
| Package | PG-TSNP-12-5 (12-pin, 5x5 mm) |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
2EDL5013U2DXTMA1 Pin Configuration
| Pin 1 | VCC — Logic supply input (4.5 V to 5.5 V) |
| Pin 2 | HIN — High-side logic input (non-inverting) |
| Pin 3 | LIN — Low-side logic input (non-inverting) |
| Pin 4 | GND — Logic and low-side ground |
| Pin 5 | LO — Low-side gate drive output |
| Pin 6 | SW — Switch node / high-side return |
| Pin 7 | HO — High-side gate drive output |
| Pin 8 | BST — Bootstrap supply (high-side floating rail) |
| Pin 9 | NC — Not connected (per datasheet) |
| Pin 10 | MCLP — Miller clamp (7 A active clamp to SW) |
| Pin 11 | NC — Not connected (per datasheet) |
| Pin 12 | PAD — Thermal pad (connect to GND plane) |
Typical Applications
2EDL5013U2DXTMA1 is suitable for 6 applications: 48 V Telecom Point-of-Load Converter, Server and Data-Center VRM Stage, Industrial DC-DC Converter Half-Bridge, Solar Micro-Inverter Power Stage, Low-Voltage BLDC Motor Drive Half-Bridge, Class D Audio Amplifier Output Stage.
48 V Telecom Point-of-Load Converter
The 2EDL5013U2DXTMA1's 120 V bootstrap rating and 3 A peak gate drive make it well-suited for 48 V telecom intermediate bus converters where the half-bridge switches 48 V at 100 kHz to 1 MHz. The integrated bootstrap diode removes one external component from the high-side supply path, while the 7 A Miller clamp prevents shoot-through during fast dV/dt transitions. Pair it with 80 V or 100 V N-channel MOSFETs and place a 1 uF X7R bootstrap capacitor within 5 mm of the BST and SW pins.
Recommended
Server and Data-Center VRM Stage
In server VRM applications the 2EDL5013U2DXTMA1 drives the high-side and low-side MOSFETs of a synchronous buck converter delivering core voltages at 500 kHz to 1 MHz. Its 4.4 ns rise time and 3.5 ns fall time minimize switching losses in the synchronous FETs, directly improving converter efficiency by 0.5% to 1% versus slower drivers. The PG-TSNP-12-5 package offers low-inductance bond wires, reducing gate ringing at high di/dt. Use a 4.7 uF X7R VCC bypass within 3 mm of the supply pin.
Recommended
Industrial DC-DC Converter Half-Bridge
Industrial 24 V to 72 V DC-DC converters rely on half-bridge topologies with bootstrap-driven high-side MOSFETs. The 2EDL5013U2DXTMA1 provides 3 A of peak gate current and 120 V of headroom on the bootstrap rail, comfortably covering 72 V industrial bus transients. The integrated UVLO on both VCC and VBS prevents operation in partially-enhanced states that would otherwise dissipate excessive heat in the MOSFETs. Match propagation delays between HO and LO within 10 ns to minimize body-diode conduction losses.
Recommended
Solar Micro-Inverter Power Stage
The 2EDL5013U2DXTMA1 can drive the half-bridge in a solar micro-inverter that operates from a 40 V to 60 V PV string at 50 kHz to 200 kHz. Its integrated bootstrap diode reduces parasitic inductance in the high-side supply, limiting overshoot on the BST rail during switching. The 7 A Miller clamp is essential when the low-side MOSFET is exposed to high dV/dt from the solar inverter's switching node. Add a TVS clamp from SW to GND to absorb leakage inductance spikes.
Recommended
Low-Voltage BLDC Motor Drive Half-Bridge
For battery-powered BLDC motor drives (e-bikes, robotics, drones) operating from 24 V to 48 V battery packs, the 2EDL5013U2DXTMA1 drives one half-bridge leg per IC. Three devices can form a complete three-phase inverter. The 3 A peak current and 120 V boot rating comfortably handle 48 V bus motors at 25 kHz PWM, while the small PG-TSNP-12-5 footprint allows compact inverter PCB designs. Ensure the controller provides programmable dead time to complement the driver's matched propagation delay.
Recommended
Class D Audio Amplifier Output Stage
Class D audio amplifiers require low-dead-time, low-distortion gate drivers to preserve audio fidelity. The 2EDL5013U2DXTMA1's matched propagation delay between HO and LO channels (typically within 5 ns) minimizes crossover distortion at the switching node. Its 4.4 ns rise time supports 250 kHz to 500 kHz switching frequencies used in audio amplifiers. The integrated bootstrap diode reduces the BOM, while the 7 A Miller clamp prevents parasitic turn-on that would otherwise inject audible noise into the speaker output.
Recommended
Recommended Products Summary
Engineering reference data for 2EDL5013U2DXTMA1 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | 2EDL5023U2DXTMA1 | 2EDL8033G4CXTMA1 | 2EDL8034G4CXTMA1 | 2EDB7259KXUMA1 |
|---|---|---|---|---|---|
| Brand | Infineon | Infineon | Infineon | Infineon | Infineon |
| Package | PG-TSNP-12-5 | PG-TSNP-12-5 | PG-TSNP-12-5 | PG-TSNP-12-5 | PG-TSNP-12-5 |
| Bootstrap Voltage (max) | 120 V | 120 V | 120 V | 120 V | 120 V |
| Integrated Bootstrap Diode | Yes | Yes | Yes | Yes | Yes |
Key Differentiators
- Integrated bootstrap diode with 120 V rating (vs IRS2110SPBF)
- 7 A active Miller clamp (vs IR2109SPBF)
- Compact PG-TSNP-12-5 5x5 mm package (vs IR2110STRPBF (SOIC-16))
Design Notes
Place the bootstrap capacitor (1 uF X7R or larger) as close as possible to the BST and SW pins, ideally within 5 mm, to minimize parasitic inductance in the high-side supply path. Long bootstrap traces create voltage ringing that can exceed the 120 V BST rating and trigger UVLO. A 100 nF ceramic bypass on VCC within 3 mm of the supply pin is also required.
The PG-TSNP-12-5 package has an exposed thermal pad (pin 12) that MUST be soldered to a copper pour of at least 100 mm squared on the top layer for adequate heat dissipation. At 3 A peak gate drive and 1 MHz switching, gate-driver losses can reach 0.3 W to 0.5 W. Without the thermal pad connected, junction temperature may rise 30-50C above ambient and approach the 125C limit.
Do not assume the integrated bootstrap diode eliminates the need for a bootstrap resistor. In high-frequency designs above 500 kHz, a small series resistor (2-5 ohm) in the BST path can slow the recharge transient and reduce ringing. Also ensure dead-time in the controller exceeds the driver's propagation delay plus turn-off time, or shoot-through will occur.
Keep the gate-drive loop (HO-SW for high-side, LO-GND for low-side) as small as possible to minimize parasitic inductance. Use a star-ground connection where the driver's GND pin ties directly to the source of the low-side MOSFET. Avoid running gate-drive traces parallel to the SW node to prevent capacitive coupling that can falsely trigger the high-side channel.
Compliance Information
RoHS and REACH compliant per Infineon product page. Not AEC-Q100 qualified - for automotive designs use an AEC-Q100 qualified driver such as the 2EDL6014ACG2DXTMA1 from the same family.