EP20K200CF484I7 vs EP20K200CF484I9N Comparison
Detailed side-by-side comparison of EP20K200CF484I7 by Altera and EP20K200CF484I9N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K200CF484I7
EP20K200CF484I7 - APEX 20KC 200K Gates FPGA 1.8V FBGA-484 | Altera
EP20K200CF484I7 β Last Time BuySpecification Comparison
| Parameter | EP20K200CF484I7 | EP20K200CF484I9N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $89.50 | $115.00 |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements | 8,320 | β |
| Typical Gate Count | 200,000 system gates | β |
| Maximum Operating Frequency | 375.94 MHz (per device-family data) | β |
| Process Technology | 0.15 Β΅m CMOS with copper interconnect | 0.15 Β΅m CMOS |
| Internal Supply Voltage (VCCINT) | 1.8 V (1.71 V to 1.89 V) | β |
| I/O Supply Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) | β |
| User I/O Pins | 376 | β |
| Dedicated Inputs | 4 | β |
| Package | 484-pin FBGA (FineLine BGA) | 484-pin FBGA (PBGA484), 1.0 mm pitch |
| Package Body Size | 23 mm Γ 23 mm | β |
| Ball Pitch | 1.000 mm | β |
| Speed Grade | -7 | I9 (industrial, highest-performance bin) |
| Temperature Grade (I7 suffix) | Industrial, -40 Β°C to +85 Β°C | β |
| Configuration Technology | SRAM-based, re-programmable in-system | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Propagation Delay | [DATA_NEEDED: datasheet-specified tpd] | β |
| Logic Elements / Cells | β | 8,320 |
| Maximum Gates | β | 200,000 |
| Maximum Internal Frequency | β | 250 MHz |
| Core Supply Voltage | β | 1.8 V nominal (1.71 V to 1.89 V) |
| User I/O Count | β | 376 (368 user I/O + 4 dedicated inputs) |
| Operating Temperature | β | [DATA_NEEDED: industrial temperature range -40C to +85C assumed for I-grade] |
| Programmable I/O Standards | β | LVTTL, LVCMOS, PCI |
| Configuration Interface | β | JTAG IEEE 1149.1, ByteBlaster/BitBlaster serial |
| On-chip Memory | β | Embedded System Blocks (ESBs) for distributed RAM/ROM |
| Lead-Free (Pb-free) | β | Yes (N suffix) |