EP20K200CF484I9 vs EP20K200CF484I9N Comparison

Detailed side-by-side comparison of EP20K200CF484I9 by Altera and EP20K200CF484I9N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K200CF484I9 EP20K200CF484I9N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $138.00 $115.00
Series APEX 20KC β€”
Family APEX 20KC (APEX 20K with ESB/CAM) APEX 20KC
Process Technology 0.15 um CMOS 0.15 Β΅m CMOS
Typical Gates 200,000 β€”
Logic Elements (Cells) 8,320 β€”
Maximum User I/O 376 β€”
Dedicated Inputs 4 β€”
Total Terminals 484 (balls) β€”
Package 484-ball FineLine BGA (FBGA), 1.00 mm pitch 484-pin FBGA (PBGA484), 1.0 mm pitch
Core Supply Voltage (VCCINT) 1.8 V nominal (1.71 V to 1.89 V) β€”
Operating Temperature Grade Industrial (I) β€”
Junction Temperature Range -40 C to +100 C β€”
Speed Grade -9 (lowest speed in EP20K200 family) I9 (industrial, highest-performance bin)
Configuration Method SRAM, JTAG in-system programmable β€”
RoHS Status unknown - confirm with supplier (legacy part) Compliant
Lifecycle Obsolete - EOL announced by Altera/Intel in 2008 β€”
Logic Elements / Cells β€” 8,320
Maximum Gates β€” 200,000
Maximum Internal Frequency β€” 250 MHz
Core Supply Voltage β€” 1.8 V nominal (1.71 V to 1.89 V)
User I/O Count β€” 376 (368 user I/O + 4 dedicated inputs)
Operating Temperature β€” [DATA_NEEDED: industrial temperature range -40C to +85C assumed for I-grade]
Programmable I/O Standards β€” LVTTL, LVCMOS, PCI
Configuration Interface β€” JTAG IEEE 1149.1, ByteBlaster/BitBlaster serial
On-chip Memory β€” Embedded System Blocks (ESBs) for distributed RAM/ROM
Lead-Free (Pb-free) β€” Yes (N suffix)

Datasheets & Resources

Browse All Products Create BOM Request Quote