EP20K200CF484I9N vs EP20K200CF484I9 Comparison

Detailed side-by-side comparison of EP20K200CF484I9N by Altera and EP20K200CF484I9 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K200CF484I9N EP20K200CF484I9
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $115.00 $138.00
Family APEX 20KC APEX 20KC (APEX 20K with ESB/CAM)
Logic Elements / Cells 8,320 β€”
Maximum Gates 200,000 β€”
Maximum Internal Frequency 250 MHz β€”
Process Technology 0.15 Β΅m CMOS 0.15 um CMOS
Core Supply Voltage 1.8 V nominal (1.71 V to 1.89 V) β€”
Package 484-pin FBGA (PBGA484), 1.0 mm pitch 484-ball FineLine BGA (FBGA), 1.00 mm pitch
User I/O Count 376 (368 user I/O + 4 dedicated inputs) β€”
Speed Grade I9 (industrial, highest-performance bin) -9 (lowest speed in EP20K200 family)
Operating Temperature [DATA_NEEDED: industrial temperature range -40C to +85C assumed for I-grade] β€”
Programmable I/O Standards LVTTL, LVCMOS, PCI β€”
Configuration Interface JTAG IEEE 1149.1, ByteBlaster/BitBlaster serial β€”
On-chip Memory Embedded System Blocks (ESBs) for distributed RAM/ROM β€”
Lead-Free (Pb-free) Yes (N suffix) β€”
RoHS Status Compliant unknown - confirm with supplier (legacy part)
Series β€” APEX 20KC
Typical Gates β€” 200,000
Logic Elements (Cells) β€” 8,320
Maximum User I/O β€” 376
Dedicated Inputs β€” 4
Total Terminals β€” 484 (balls)
Core Supply Voltage (VCCINT) β€” 1.8 V nominal (1.71 V to 1.89 V)
Operating Temperature Grade β€” Industrial (I)
Junction Temperature Range β€” -40 C to +100 C
Configuration Method β€” SRAM, JTAG in-system programmable
Lifecycle β€” Obsolete - EOL announced by Altera/Intel in 2008

Datasheets & Resources

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