EP20K200RC208-2 vs EP20K200RC208-1 Comparison
Detailed side-by-side comparison of EP20K200RC208-2 by Altera and EP20K200RC208-1 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K200RC208-1 - APEX 20K 200K Gates FPGA, 208-Pin RQFP | Intel / Altera
EP20K200RC208-1 β Last Time BuySpecification Comparison
| Parameter | EP20K200RC208-2 | EP20K200RC208-1 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $79.67 | $78.00 |
| Series | APEX-20K | APEX 20K (200K gates) |
| Family | APEX-20K MultiCore FPGA | APEX-20K |
| Logic Elements (LEs) | 8320 | β |
| System Gates | 200,000 (typical) | 200,000 |
| Embedded Memory (bits) | 106,496 | 106,496 |
| Maximum User I/O | 144 | 144 |
| Package | 208-BQFP / 208-RQFP with Exposed Pad | 208-BFQFP (RQFP) with Exposed Pad, 28Γ28 mm |
| Pin Count | 208 | β |
| Speed Grade | -2 (mid-speed, industrial) | β |
| Operating Temperature | -40C to +85C (industrial) | Industrial range |
| Supply Voltage (Core) | [DATA_NEEDED: core VCC] | β |
| Supply Voltage (I/O) | 3.3 V (multi-standard I/O) | β |
| Configuration Interface | JTAG (IEEE 1149.1) + Altera legacy scheme | Passive Serial, Passive Parallel, JTAG (IEEE 1149.1) |
| Process Technology | [DATA_NEEDED: process node] | 0.22 Β΅m CMOS |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL Level] |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Logic Elements / Cells | β | 8,320 |
| Number of PLLs | β | 4 |
| Core Supply Voltage | β | 2.5 V |
| I/O Standard Support | β | LVTTL, LVCMOS, 2.5 V/3.3 V PCI, 1.8 V LVDS |
| Maximum Internal Frequency | β | 250 MHz |