EP20K400BC652-1 vs EP20K400GC655-1 Comparison

Detailed side-by-side comparison of EP20K400BC652-1 by Intel and EP20K400GC655-1 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400BC652-1 EP20K400GC655-1
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $108.00 $135.00
Series APEX-20K EP20K400
Family APEX 20KE (1.8 V, LVDS) APEX 20K
Logic Macrocells 1664 β€”
Total Gates 400,000 β€”
User I/O 502 β€”
Package 652-BGA (45x45 mm, thermally enhanced) 655-pin CPGA (Ceramic Pin Grid Array)
Supplier Device Package 652-BGA β€”
Total RAM Bits 212,992 212,992
Propagation Delay 2.5 ns 2.5 ns
Supply Voltage - Core 1.71 V to 1.89 V (2.5 V standard) β€”
Logic Family CMOS β€”
Operating Temperature 0 Β°C to 85 Β°C (commercial) 0 Β°C to +85 Β°C (commercial)
Mounting Type Surface Mount Through-Hole
MSL Level [DATA_NEEDED: MSL Level] β€”
RoHS Status unknown Non-compliant (contains lead in ceramic package)
Architecture MultiCore (LUT + product-term + embedded memory) β€”
Logic Elements β€” 16,640
Maximum Gates β€” 1,052,000
Typical Gates β€” 400,000
Embedded System Blocks (ESBs) β€” 4
Maximum User I/O β€” 502
Dedicated Inputs β€” 6
Process Technology β€” 0.22 Β΅m CMOS
Core Supply Voltage β€” 2.5 V
I/O Supply Voltage β€” 3.3 V
Maximum Internal Frequency β€” 250 MHz
Pin Count β€” 655
Configuration Modes β€” Passive Serial, Passive Parallel Async, Passive Parallel Sync
Boundary Scan β€” IEEE 1149.1 (JTAG)

Datasheets & Resources

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