EP20K400CF672C7 vs EP20K400CF672C7N Comparison

Detailed side-by-side comparison of EP20K400CF672C7 by Altera and EP20K400CF672C7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400CF672C7 EP20K400CF672C7N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $195.00 $160.00
Series APEX-20KC β€”
Family APEX 20KC (MultiCoreβ„’) APEX 20KC
Logic Elements / Cells 16,640 β€”
System Gates 400,000 β€”
Embedded Memory (RAM bits) 212,992 β€”
Maximum User I/O 488 488
Number of I/O Banks 8 β€”
Package 672-BBGA (FC-FBGA, FineLine BGA) 672-ball FineLine BGA (FC-FBGA / BBGA)
Pin Count 672 β€”
Core Voltage 1.8 V β€”
Supply Voltage 2.5 V (I/O reference) β€”
Process Technology 0.15 Β΅m CMOS 0.18-micron CMOS, all-layer copper interconnect
Propagation Delay (tPD) 2.5 ns β€”
Maximum Internal Frequency 375.94 MHz β€”
Operating Temperature 0 Β°C to +85 Β°C (Commercial, C-grade) 0 C to 85 C (Commercial)
PLL Count 4 β€”
Speed Grade -7 β€”
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
RoHS Status Non-compliant (legacy product) [DATA_NEEDED: RoHS status not in provided data]
Lead-Free Contains lead (legacy BGA finish) β€”
Maximum System Gates β€” 1,052,000
Typical Gates β€” 400,000
Logic Elements (LEs) β€” 16,640
Embedded Memory β€” 488 Kbits
User I/O (per catalog) β€” 480 / 502 (per source)
Core Voltage (VCCINT) β€” 1.8 V
I/O Voltage (VCCIO) β€” 3.3 V / 2.5 V banked
Propagation Delay β€” 2.5 ns (catalog) / 1.48 ns (some catalog)
Maximum Frequency β€” 375.94 MHz (internal)
MSL Level β€” 3 (per JEDEC J-STD-020)
Configuration Modes β€” PS, PPS, JTAG

Datasheets & Resources

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