EP20K400CF672C8N vs EP20K400CF672C-8 Comparison

Detailed side-by-side comparison of EP20K400CF672C8N by Intel and EP20K400CF672C-8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400CF672C8N EP20K400CF672C-8
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $68.40 $95.00
Family APEX 20KC APEX 20K
Device Logic Elements 16,640 (Macros / Cells) β€”
Maximum System Gates 400,000 β€”
Maximum User I/O 488 488
Embedded Memory 212,992 bits β€”
Package 672-ball FineLine BGA (FC-FBGA672) β€”
Package Body Size 27 Γ— 27 mm β€”
Ball Pitch 1.0 mm β€”
Supply Voltage (Core) 1.8 V β€”
Logic Family CMOS β€”
Process Technology 0.15 Β΅m all-layer copper CMOS 0.15 Β΅m all-layer copper CMOS
Propagation Delay 2.5 ns (C speed grade) β€”
Maximum Internal Frequency 301.21 MHz β€”
Operating Temperature 0 Β°C to +85 Β°C (commercial) β€”
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
Lead-Free / RoHS Yes (N suffix) β€”
Logic Elements β€” 16,640
Typical Gates β€” 400,000
Macros β€” 1,664
Number of I/O Banks β€” [DATA_NEEDED: number of I/O banks]
Package Type β€” PBGA-672 (FineLine BGA, 27 x 27 mm, 1.0 mm pitch)
Core Voltage (VCCINT) β€” 1.8 V nominal (1.71 V to 1.89 V)
I/O Voltage (VCCIO) β€” [DATA_NEEDED: VCCIO options]
Pin-to-Pin Delay (tPD) β€” 1.78 ns (speed grade -8)
Speed Grade β€” -8
Temperature Grade (C) β€” Commercial, 0 Β°C to 85 Β°C
Embedded Memory Type β€” ESB (RAM / ROM / CAM)
Configuration Interface β€” JTAG (IEEE 1149.1), Passive Serial, Passive Parallel
JTAG Support β€” Yes (IEEE 1149.1 boundary-scan)
RoHS Status β€” [DATA_NEEDED: RoHS compliance]
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

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