EP20K400FI672-1 vs EP20K400FI672-1XN Comparison
Detailed side-by-side comparison of EP20K400FI672-1 by Intel and EP20K400FI672-1XN by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K400FI672-1 | EP20K400FI672-1XN |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $92.00 | $171.00 |
| Series | APEX 20K | β |
| Device Family | APEX-20K Field Programmable Gate Array | β |
| Typical Gates | 400,000 | 400,000 |
| Logic Elements | 212,992 | 16,640 |
| Logic Array Blocks (LABs) | 16,640 | β |
| User I/O Pins | 502 | β |
| Dedicated Inputs | 4 | β |
| Total Terminals | 672 | β |
| Package | 672-ball PBGA (FineLine BGA, 1.0 mm pitch) | 672-ball FineLine BGA (FI672) |
| Package Code (JEDEC) | S-PBGA-B672 | β |
| Core Supply Voltage (VCCINT) | 2.5 V nominal (2.375 V to 2.625 V) | β |
| Process Technology | CMOS | 0.18 micrometer CMOS |
| Propagation Delay | 2.5 ns | β |
| Speed Grade | -1 | -1 |
| Operating Temperature | Industrial (per 'I' suffix) | -40 C to +85 C (industrial) |
| MSL Level | 3 | 3 |
| Peak Reflow Temperature | 220 C | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Family | β | APEX 20K |
| Device | β | EP20K400 |
| Maximum User I/O Pins | β | 488 |
| Embedded System Memory | β | 212 Kbit |
| Number of PLLs | β | 4 |
| Core Supply Voltage | β | 2.5 V (2.375 V to 2.625 V) |
| I/O Supply Voltage | β | 2.5 V / 3.3 V |
| Package Size | β | 27 mm x 27 mm |
| Configuration Method | β | SRAM, JTAG, EPC serial PROM |
| JTAG Support | β | IEEE 1149.1 boundary-scan compliant |