EP20K400FI672-3 vs EP20K400FC672-3 Comparison

Detailed side-by-side comparison of EP20K400FI672-3 by Altera and EP20K400FC672-3 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400FI672-3 EP20K400FC672-3
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $195.00 $138.00
Family APEX 20K APEX 20K
Series EP20K400 β€”
Logic Elements 16640 β€”
Total Gates up to 400000 β€”
Embedded RAM 212992 bits β€”
Maximum User I/O 502 β€”
Dedicated Inputs 6 β€”
Propagation Delay 3.6 ns 2.5 ns
Maximum Clock Frequency 833 MHz β€”
Supply Voltage (Nominal) 2.5 V β€”
Supply Voltage Range 2.375 V to 2.625 V β€”
Process Technology CMOS 0.22 Β΅m CMOS
Package Type PBGA (Plastic BGA) β€”
Package Code S-PBGA-B672 BGA
Terminal Count 672 β€”
Terminal Pitch 1.000 mm β€”
Package Shape Square BGA β€”
Mounting Type Surface Mount Surface Mount
Configuration Interface JTAG (IEEE 1149.1) β€”
Operating Temperature [DATA_NEEDED: operating temperature range] 0 Β°C to 85 Β°C
MSL Level 3 β€”
Peak Reflow Temperature 220 C β€”
Device Logic Elements β€” 16,640 cells
Typical Gate Count β€” 400,000 system gates
Maximum User I/Os β€” 502
Internal Performance β€” 167 MHz
Core Supply Voltage β€” 2.5 V
Logic Family β€” CMOS, SRAM-based
Package β€” 672-pin FC-FBGA
Number of Terminals β€” 672
Terminal Form β€” Ball (BGA)
Speed Grade β€” -3 (commercial fastest)
Architecture β€” MultiCore (LUT + Embedded System Blocks)
Programming Method β€” SRAM, JTAG (ByteBlaster)
Lifecycle Status β€” Obsolete / Legacy
RoHS Status β€” [DATA_NEEDED: RoHS status]

Datasheets & Resources

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