EP20K400FI672-3 vs EP20K400FI672-1 Comparison
Detailed side-by-side comparison of EP20K400FI672-3 by Altera and EP20K400FI672-1 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K400FI672-3 | EP20K400FI672-1 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $195.00 | $92.00 |
| Family | APEX 20K | β |
| Series | EP20K400 | APEX 20K |
| Logic Elements | 16640 | 212,992 |
| Total Gates | up to 400000 | β |
| Embedded RAM | 212992 bits | β |
| Maximum User I/O | 502 | β |
| Dedicated Inputs | 6 | 4 |
| Propagation Delay | 3.6 ns | 2.5 ns |
| Maximum Clock Frequency | 833 MHz | β |
| Supply Voltage (Nominal) | 2.5 V | β |
| Supply Voltage Range | 2.375 V to 2.625 V | β |
| Process Technology | CMOS | CMOS |
| Package Type | PBGA (Plastic BGA) | β |
| Package Code | S-PBGA-B672 | β |
| Terminal Count | 672 | β |
| Terminal Pitch | 1.000 mm | β |
| Package Shape | Square BGA | β |
| Mounting Type | Surface Mount | β |
| Configuration Interface | JTAG (IEEE 1149.1) | β |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | Industrial (per 'I' suffix) |
| MSL Level | 3 | 3 |
| Peak Reflow Temperature | 220 C | 220 C |
| Device Family | β | APEX-20K Field Programmable Gate Array |
| Typical Gates | β | 400,000 |
| Logic Array Blocks (LABs) | β | 16,640 |
| User I/O Pins | β | 502 |
| Total Terminals | β | 672 |
| Package | β | 672-ball PBGA (FineLine BGA, 1.0 mm pitch) |
| Package Code (JEDEC) | β | S-PBGA-B672 |
| Core Supply Voltage (VCCINT) | β | 2.5 V nominal (2.375 V to 2.625 V) |
| Speed Grade | β | -1 |
| RoHS Status | β | [DATA_NEEDED: RoHS compliance] |