EP20K400GC655-3V vs EP20K400GI655-1V Comparison
Detailed side-by-side comparison of EP20K400GC655-3V by Intel and EP20K400GI655-1V by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel
EP20K400GI655-1V β Last Time BuySpecification Comparison
| Parameter | EP20K400GC655-3V | EP20K400GI655-1V |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $160.00 | $155.00 |
| Series | APEX-20KC | β |
| Family | APEX 20KC (Apex 20KE Device Family, 1.8 V, LVDS) | APEX 20K |
| Manufacturer | Altera (now Intel) | β |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | 2.5 V |
| Logic Elements | 16640 | 16,640 |
| Total RAM Bits | 212992 | β |
| Typical Gate Count | 400000 | β |
| Number of User I/O | 496 | β |
| Maximum Clock Frequency | 714.2 MHz | β |
| Propagation Delay | 3.6 ns | 2.5 ns |
| Speed Grade | -3V (commercial temperature, Vcc 1.8 V) | β |
| Package | 655-BCPGA (62.48 mm x 62.48 mm) | β |
| Package Equivalence Code | SPGA655, 47x47 | SPGA655, 47x47 |
| Mounting Type | Through Hole (CPGA) | β |
| Peak Reflow Temperature | 220 C | β |
| Process Technology | CMOS | CMOS |
| Configuration | SRAM-based (requires EPC configuration device) | In-system programmable via JTAG |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance flag - BCPGA package often non-RoHS] | [DATA_NEEDED] |
| Operating Temperature | [DATA_NEEDED: commercial / industrial / military grade] | [DATA_NEEDED: industrial vs military grade] |
| Typical Gates | β | 400,000 |
| Maximum User I/O | β | 502 |
| Dedicated Inputs | β | 4 |
| Package Type | β | CBGA-655 (Ceramic Ball Grid Array) |
| Package Code (JESD-30) | β | S-CPGA-P655 |
| I/O Supply Voltage | β | 2.5 V / 3.3 V |
| Boundary Scan | β | IEEE 1149.1 JTAG |
| MSL Level | β | 1 |
| Package Body Material | β | Ceramic |