EP20K600CB652C-8 vs EP20K600CB652C9 Comparison
Detailed side-by-side comparison of EP20K600CB652C-8 by Altera and EP20K600CB652C9 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CB652C-8 | EP20K600CB652C9 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $86.00 | $142.50 |
| Series | APEX 20KC | β |
| Family | APEX 20KC (MultiCore) | APEX 20KC |
| Typical Gates | 600,000 | β |
| Logic Elements | 24,320 | β |
| Embedded RAM | 311,296 bits | β |
| User I/Os | 488 | β |
| Propagation Delay | 1.48 ns (per published source) | β |
| Package | 652-BGA (LBGA, 45 x 45 mm, 1.27 mm pitch) | 652-BGA (45 Γ 45 mm, 1.27 mm pitch) |
| Mounting Type | Surface Mount (thermally enhanced) | Surface Mount (BGA) |
| Operating Temperature | 0 C to 85 C (commercial) | 0 Β°C to 85 Β°C (commercial) |
| Speed Grade | -8 (slowest, most timing margin) | β |
| VCCIO Options | 1.8 V / 2.5 V / 3.3 V | β |
| Process | 0.15 Β΅m all-layer copper metal | β |
| PCI Compliance | PCI Local Bus Rev 2.2 at 33/66 MHz, 32/64-bit | β |
| Memory Interface Support | DDR SDRAM, ZBT SRAM, QDR SRAM, LVDS | β |
| Configuration | Enhanced (EPC) bitstream | JTAG IEEE 1149.1 / serial / EPC2-compatible |
| Logic Elements / Cells | β | 24,320 |
| Number of LABs / CLBs | β | 2,432 |
| System Gates | β | 1,537,000 |
| Total RAM Bits | β | 311,296 |
| User I/O | β | 488 |
| Number of I/O Banks | β | [DATA_NEEDED: I/O bank count] |
| Supply Voltage | β | 1.71 V to 1.89 V |
| Process Technology | β | 0.15 Β΅m all-layer copper CMOS |
| Internal Datapath Frequency | β | up to 250 MHz |
| Propagation Delay (typ.) | β | 1.48 ns |
| RoHS Status | β | Compliant (per Altera product page) |
| Product Status | β | Obsolete (per distributor listings) |