EP20K600CB652C9 vs EP20K600CB652C7ES Comparison

Detailed side-by-side comparison of EP20K600CB652C9 by Altera and EP20K600CB652C7ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CB652C9 EP20K600CB652C7ES
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $142.50 $195.00
Family APEX 20KC APEX 20KC
Logic Elements / Cells 24,320 β€”
Number of LABs / CLBs 2,432 β€”
System Gates 1,537,000 600,000
Total RAM Bits 311,296 β€”
User I/O 488 β€”
Number of I/O Banks [DATA_NEEDED: I/O bank count] β€”
Supply Voltage 1.71 V to 1.89 V β€”
Process Technology 0.15 Β΅m all-layer copper CMOS 0.15 Β΅m CMOS
Internal Datapath Frequency up to 250 MHz β€”
Propagation Delay (typ.) 1.48 ns β€”
Operating Temperature 0 Β°C to 85 Β°C (commercial) 0 Β°C to +85 Β°C (commercial)
Package 652-BGA (45 Γ— 45 mm, 1.27 mm pitch) β€”
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
Configuration JTAG IEEE 1149.1 / serial / EPC2-compatible β€”
RoHS Status Compliant (per Altera product page) [DATA_NEEDED: RoHS status]
Product Status Obsolete (per distributor listings) β€”
Logic Elements β€” 24,320
Maximum System Gates β€” 1,053,840
Embedded Memory Bits β€” 311,296
Embedded System Blocks (ESB) β€” 26
Maximum User I/O β€” 488
User I/O (this package) β€” 488 (652-BGA)
Supply Voltage - Core β€” 1.71 V to 1.89 V (1.8 V nominal)
Maximum Internal Clock Frequency β€” 1666.6 MHz
Propagation Delay β€” 1.6 ns
Package Type β€” 652-ball FineLine BGA
JEDEC Package Code β€” S-PBGA-B652
Configuration Modes β€” Passive Serial, Passive Parallel, JTAG
JTAG Boundary Scan β€” IEEE 1149.1 compliant
PLLs β€” 4

Datasheets & Resources

Browse All Products Create BOM Request Quote