EP20K600CF672C-9 vs EP20K600CF672C6 Comparison
Detailed side-by-side comparison of EP20K600CF672C-9 by Altera and EP20K600CF672C6 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K600CF672C-9 - 600K Gates APEX 20KC FPGA 488 I/O BGA-672 | Altera
EP20K600CF672C-9 Obsolete
Specification Comparison
| Parameter | EP20K600CF672C-9 | EP20K600CF672C6 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $171.00 | $480.00 |
| Device Type | FPGA (APEX 20KC family, complex PLD) | β |
| Typical Gate Count | 600,000 gates | 600,000 gates |
| Logic Elements (LEs) | [DATA_NEEDED: logic element count] | 24,320 |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count and total RAM bits] | 160 (each 2,048 bits) |
| User I/Os | 488 pins | β |
| PLLs | 4 | β |
| Package | 672-ball FBGA (45 x 45 mm, 1.27 mm pitch) | 672-ball FineLine BGA (CF672) |
| Pin Count | 672 | β |
| Core Supply Voltage (VCCINT) | 1.8 V | β |
| I/O Supply Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) | β |
| Propagation Delay | 1.48 ns | β |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial) | 0 Β°C to +85 Β°C (commercial) |
| Speed Grade | -9 | -6 (C6) |
| Process Technology | 0.15 Β΅m all-layer copper interconnect | 0.18 Β΅m CMOS, 6 metal layers |
| Configuration Interface | Serial (EPC16 / EPC8 / EPC4 / EPC2 / EPC1) | β |
| Mounting Type | Surface Mount (BGA) | β |
| RoHS Status | unknown | Non-RoHS (legacy process) |
| Family | β | APEX 20KC |
| Maximum Embedded RAM | β | 311,296 bits (311 kbit) |
| Maximum User I/O Pins | β | 508 |
| Package Body Size | β | 27 mm Γ 27 mm |
| Core Voltage | β | 1.8 V |
| I/O Standards Supported | β | LVCMOS, LVTTL, HSTL, SSTL, GTL+ |
| Embedded PLLs | β | 4 |
| Configuration Method | β | SRAM-based, JTAG, EPC16/EPC2 |