EP20K600CF672C6 vs EP20K600CF672C-9 Comparison
Detailed side-by-side comparison of EP20K600CF672C6 by Altera and EP20K600CF672C-9 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K600CF672C-9 - 600K Gates APEX 20KC FPGA 488 I/O BGA-672 | Altera
EP20K600CF672C-9 ObsoleteSpecification Comparison
| Parameter | EP20K600CF672C6 | EP20K600CF672C-9 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $480.00 | $171.00 |
| Family | APEX 20KC | β |
| Typical Gate Count | 600,000 gates | 600,000 gates |
| Logic Elements (LEs) | 24,320 | [DATA_NEEDED: logic element count] |
| Embedded System Blocks (ESBs) | 160 (each 2,048 bits) | [DATA_NEEDED: ESB count and total RAM bits] |
| Maximum Embedded RAM | 311,296 bits (311 kbit) | β |
| Maximum User I/O Pins | 508 | β |
| Package | 672-ball FineLine BGA (CF672) | 672-ball FBGA (45 x 45 mm, 1.27 mm pitch) |
| Package Body Size | 27 mm Γ 27 mm | β |
| Speed Grade | -6 (C6) | -9 |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial) | 0 Β°C to +85 Β°C (commercial) |
| Core Voltage | 1.8 V | β |
| I/O Standards Supported | LVCMOS, LVTTL, HSTL, SSTL, GTL+ | β |
| Embedded PLLs | 4 | β |
| Process Technology | 0.18 Β΅m CMOS, 6 metal layers | 0.15 Β΅m all-layer copper interconnect |
| Configuration Method | SRAM-based, JTAG, EPC16/EPC2 | β |
| RoHS Status | Non-RoHS (legacy process) | unknown |
| Device Type | β | FPGA (APEX 20KC family, complex PLD) |
| User I/Os | β | 488 pins |
| PLLs | β | 4 |
| Pin Count | β | 672 |
| Core Supply Voltage (VCCINT) | β | 1.8 V |
| I/O Supply Voltage (VCCIO) | β | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) |
| Propagation Delay | β | 1.48 ns |
| Configuration Interface | β | Serial (EPC16 / EPC8 / EPC4 / EPC2 / EPC1) |
| Mounting Type | β | Surface Mount (BGA) |