EP20K600EBC652-2X vs EP20K600EFC33-2X Comparison
Detailed side-by-side comparison of EP20K600EBC652-2X by Altera and EP20K600EFC33-2X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600EBC652-2X | EP20K600EFC33-2X |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $275.00 | $815.00 |
| Device Family | APEX 20KE | β |
| Device Type | SPLD / FPGA (Field Programmable Gate Array) | β |
| Logic Elements (LEs) | 24,320 | β |
| Macros | 24,320 | β |
| Embedded Memory Bits | 311,296 bits | β |
| User I/Os | 488 | β |
| Package | 652-ball BGA, 45 x 45 mm, 1.27 mm pitch | 1020-ball FC-FBGA (33 mm x 33 mm) |
| Total Pins / Balls | 652 | β |
| Propagation Delay | 1.48 ns | 1.48 ns |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial) | 0C to +85C |
| Process Technology | 0.15 Β΅m all-layer copper CMOS | 0.15 um all-layer copper metal |
| Core Supply Voltage | 2.5 V | 1.71 V to 1.89 V (1.8 V nominal) |
| I/O Standard Support | LVTTL, LVCMOS, PCI, SSTL, GTL+ | β |
| Configuration Modes | Passive serial, passive parallel, JTAG (IEEE 1149.1) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-compliant (legacy Altera product) |
| Series | β | APEX-20KE |
| Family | β | APEX 20K (System-on-a-Programmable-Chip) |
| Logic Elements / Cells | β | 24320 |
| Total Gates | β | 600000 |
| Total RAM Bits | β | 311296 |
| Number of I/O | β | 588 |
| Maximum Internal Frequency | β | 200 MHz |
| Ball Pitch | β | 1.27 mm |
| Lead-Free Status | β | Contains lead (legacy) |
| Multi-Voltage I/O Support | β | 1.5V / 1.8V / 2.5V / 3.3V / 5.0V |
| Embedded System Blocks | β | Dual-port RAM / FIFO configurable |