EP2A25F672I8N vs EP2A25F672I9N Comparison
Detailed side-by-side comparison of EP2A25F672I8N by Intel and EP2A25F672I9N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2A25F672I8N - APEX II FPGA 900K Gates 672-BGA | Intel / Altera
EP2A25F672I8N β Last Time BuySpecification Comparison
| Parameter | EP2A25F672I8N | EP2A25F672I9N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $198.50 | $215.00 |
| Family | APEX II | APEX II |
| Device | EP2A25 | β |
| Logic Elements | 24,320 | β |
| Gates | 900,000 | β |
| Embedded Memory (bits) | 622,592 | β |
| User I/Os | 492 | β |
| Package | 672-ball FC-FBGA (FineLine BGA) | 672-pin FC-FBGA |
| Package Size | 27 x 27 mm | β |
| Ball Pitch | 1 mm | β |
| Process Technology | 0.15 Β΅m all-layer copper-metal | 0.15 Β΅m CMOS |
| Metal Layers | Up to 8 | β |
| Core Voltage (VCCINT) | 1.5 V | β |
| Internal Frequency (max) | 333 MHz | β |
| Propagation Delay | 1.69 ns | β |
| Operating Temperature | 0 Β°C to 85 Β°C | -40 Β°C to +85 Β°C (Industrial, 'I' suffix) |
| Logic Family | CMOS | β |
| I/O Standards Supported | True-LVDS, LVPECL, PCML, HyperTransport | β |
| Configuration Method | SRAM-based (Altera Quartus II) | β |
| RoHS Status | unknown | [DATA_NEEDED: confirmed] |
| Lead-Free | unknown | β |
| Series | β | APEX II (EP2A25) |
| Device Type | β | FPGA (Field-Programmable Gate Array) |
| Logic Elements / Cells | β | 24,320 |
| System Gates | β | 900,000 (typical) |
| Maximum Internal Frequency | β | 236 MHz |
| Propagation Delay (tpd) | β | 2.23 ns |
| Core Supply Voltage (VCCINT) | β | 1.5 V nominal (1.425 V to 1.525 V) |
| I/O Supply Voltage | β | [DATA_NEEDED: VCCIO range] |
| Mounting Type | β | Surface Mount |
| Speed Grade | β | 9 (fastest commercial APEX II) |
| Embedded System Blocks (ESB) | β | Yes (on-chip RAM/ROM) |
| PLLs | β | 4 |
| Configuration | β | JTAG / in-system programmable |
| MSL Level | β | [DATA_NEEDED] |
| AEC-Q100 | β | not_applicable |