EP2A40F1020C9N vs EP2A40F1020C8N Comparison
Detailed side-by-side comparison of EP2A40F1020C9N by Intel and EP2A40F1020C8N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2A40F1020C9N | EP2A40F1020C8N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $175.00 | $0.00 |
| Family | APEX II | β |
| Series | EP2A40 | β |
| Device Type | FPGA (Field-Programmable Gate Array) | β |
| Logic Family | CMOS | β |
| System Gates | 1.5 M | β |
| Logic Cells / Elements | 38,400 | β |
| Maximum Operating Frequency | 366 MHz | β |
| Propagation Delay | 1.55 ns | β |
| Core Voltage | 1.5 V | β |
| Process Technology | 0.15 Β΅m all-layer copper (up to 8 metal layers) | β |
| User I/O Pins | 735 | β |
| Total Pins | 1020 | β |
| Package | 1020-ball FC-FBGA, 33 Γ 33 mm, 1 mm pitch, FineLine | β |
| Operating Temperature | 0 Β°C to 85 Β°C | 0 Β°C to 85 Β°C |
| I/O Standards | True-LVDS, LVPECL, PCML, HyperTransport, LVTTL, LVCMOS, PCI, GTL+, SSTL | β |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | β |
| On-chip Memory | Embedded System Blocks (ESB) for RAM/ROM | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| RoHS Status | unknown | unknown |
| Product Type | β | Field-Programmable Gate Array (FPGA) |
| Device Family | β | APEX II |
| Logic Technology | β | CMOS |
| Logic Gates | β | 1.5 million |
| Logic Cells | β | 38,400 |
| Nominal Supply Voltage | β | 1.5 V |
| Supply Voltage Range | β | 1.425 V to 1.575 V |
| User I/Os | β | 735 |
| Package Terminal Count | β | 1,020 pins |
| Package Type | β | FC-FBGA, BGA-1020 |
| Package Body Size | β | 33 mm x 33 mm |
| Ball Pitch | β | 1 mm |
| Reported Operating Frequency | β | 376 MHz |
| Alternative Reported Frequency | β | 562 MHz |
| Reported Propagation Delay | β | 1.78 ns |
| Alternative Reported Propagation Delay | β | 1.55 ns |
| Fabrication Process | β | 0.15 Β΅m |
| Maximum Reported Metal Layers | β | 8 layers |
| Terminal Form | β | Ball |
| REACH Status | β | unknown |
| AEC-Q100 Qualification | β | unknown |