EP2S60F672C4N vs EP2S60F672C3 Comparison
Detailed side-by-side comparison of EP2S60F672C4N by Intel and EP2S60F672C3 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S60F672C4N | EP2S60F672C3 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $325.00 | $1,033.14 |
| Family | Stratix II | Stratix II |
| Process Technology | 90 nm | 90 nm CMOS |
| Logic Elements (LE) | 60,440 | β |
| Adaptive Logic Modules (ALM) | 24,176 | β |
| Embedded Memory (bits) | 2,544,192 | β |
| Embedded Multiplier Blocks | [DATA_NEEDED: 9x9 multiplier count] | [DATA_NEEDED: 9x9 multiplier count] |
| DSP Blocks | [DATA_NEEDED: DSP block count] | [DATA_NEEDED: DSP block count] |
| Maximum User I/O | 492 | β |
| Core Voltage | 1.2 V | 1.2 V |
| Maximum Fabric Clock | 711.24 MHz | β |
| Package | 672-pin FC-FBGA | 672-BBGA, FC-FBGA, 35 x 35 mm, 1.0 mm pitch |
| Package Type | FineLine Ball-Grid Array | β |
| Speed Grade | C4 (commercial) | C3 |
| Operating Temperature | 0C to +85C (commercial) | 0C to +85C (commercial) |
| Configuration Method | JTAG, Fast Passive Parallel, Active Serial | β |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | 3 | [DATA_NEEDED: MSL level] |
| Lead-Free / RoHS | Yes (lead-free finish) | β |
| Logic Elements | β | 60,440 |
| Adaptive Logic Modules (ALMs) | β | [DATA_NEEDED: ALM count] |
| Total RAM Bits | β | 2,544,192 |
| User I/Os | β | 492 |
| PLLs | β | 4 |
| Global Clocks | β | [DATA_NEEDED: global clock count] |
| Configuration Modes | β | PS, PPS, PPA, FPP, JTAG |
| RoHS Status | β | [DATA_NEEDED: RoHS status] |