EP2S60F672C5 vs EP2S60F672C4N Comparison
Detailed side-by-side comparison of EP2S60F672C5 by Intel and EP2S60F672C4N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S60F672C5 | EP2S60F672C4N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $410.85 | $325.00 |
| Family | Stratix II | Stratix II |
| Device Family | Stratix II FPGA | β |
| Logic Elements | 60,440 | β |
| Configurable Logic Blocks (CLBs) | 24,176 | β |
| Total RAM Bits | 2,544,192 bits | β |
| Maximum User I/Os | 492 | β |
| Operating Frequency | Up to 609.76 MHz | β |
| Core Voltage | 1.2 V | 1.2 V |
| Process Technology | 90 nm CMOS | 90 nm |
| Package | 672-ball FC-FBGA (35 Γ 35 mm, 1 mm pitch) | 672-pin FC-FBGA |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (C5 suffix) | β |
| Operating Temperature Range | 0Β°C to +85Β°C | β |
| Number of PLLs | 4 | β |
| DSP Blocks | 12 (dedicated 18 Γ 18 multipliers) | [DATA_NEEDED: DSP block count] |
| I/O Standards | LVDS, LVTTL, SSTL, HSTL, PCI-X | β |
| Configuration Scheme | Fast Passive Parallel, JTAG, Active Serial | β |
| RoHS Status | Non-RoHS (legacy product, pre-RoHS production runs) | β |
| Logic Elements (LE) | β | 60,440 |
| Adaptive Logic Modules (ALM) | β | 24,176 |
| Embedded Memory (bits) | β | 2,544,192 |
| Embedded Multiplier Blocks | β | [DATA_NEEDED: 9x9 multiplier count] |
| Maximum User I/O | β | 492 |
| Maximum Fabric Clock | β | 711.24 MHz |
| Package Type | β | FineLine Ball-Grid Array |
| Speed Grade | β | C4 (commercial) |
| Operating Temperature | β | 0C to +85C (commercial) |
| Configuration Method | β | JTAG, Fast Passive Parallel, Active Serial |
| MSL Level | β | 3 |
| Lead-Free / RoHS | β | Yes (lead-free finish) |