EP2S60F672C5 vs EP2S60F672C5N Comparison
Detailed side-by-side comparison of EP2S60F672C5 by Intel and EP2S60F672C5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S60F672C5 | EP2S60F672C5N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $410.85 | $170.00 |
| Family | Stratix II | Stratix II |
| Device Family | Stratix II FPGA | β |
| Logic Elements | 60,440 | β |
| Configurable Logic Blocks (CLBs) | 24,176 | β |
| Total RAM Bits | 2,544,192 bits | β |
| Maximum User I/Os | 492 | 492 |
| Operating Frequency | Up to 609.76 MHz | β |
| Core Voltage | 1.2 V | β |
| Process Technology | 90 nm CMOS | 90 nm |
| Package | 672-ball FC-FBGA (35 Γ 35 mm, 1 mm pitch) | 672-ball FC-FBGA |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (C5 suffix) | β |
| Operating Temperature Range | 0Β°C to +85Β°C | β |
| Number of PLLs | 4 | β |
| DSP Blocks | 12 (dedicated 18 Γ 18 multipliers) | β |
| I/O Standards | LVDS, LVTTL, SSTL, HSTL, PCI-X | β |
| Configuration Scheme | Fast Passive Parallel, JTAG, Active Serial | β |
| RoHS Status | Non-RoHS (legacy product, pre-RoHS production runs) | Non-compliant (contains lead, per Altera/Intel EOL notice) |
| Logic Elements (LEs) | β | 60440 |
| Logic Array Blocks (LABs) | β | 3022 |
| Embedded Memory (bits) | β | 2544192 |
| Core Voltage (VCCINT) | β | 1.2 V |
| Maximum Internal Frequency | β | 609.76 MHz |
| Speed Grade | β | C5 (commercial) |
| Temperature Grade | β | Commercial |
| MSL Level | β | [DATA_NEEDED: MSL level] |
| Configuration Memory | β | SRAM-based (volatile, requires external configuration device) |