EP2S90F780C5N vs EP2S90F780C5 Comparison

Detailed side-by-side comparison of EP2S90F780C5N by Intel and EP2S90F780C5 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP2S90F780C5 EP2S90F780C5 - Stratix II FPGA, 90,960 LEs, 780-FBGA | Altera

EP2S90F780C5 - Stratix II FPGA, 90,960 LEs, 780-FBGA | Altera

EP2S90F780C5 ⚠ Last Time Buy

Specification Comparison

Parameter EP2S90F780C5N EP2S90F780C5
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $198.00 $1,100.00
Family Stratix II Stratix II FPGA
Logic Elements 90,960 90,960
Adaptive Logic Modules (ALMs) 45,960 β€”
Embedded Memory Bits 4,520,488 β€”
Embedded Multipliers (18x18) 384 β€”
Maximum User I/O 534 β€”
User I/O Banks [DATA_NEEDED: user I/O bank count] β€”
Process Technology 90 nm CMOS 90 nm CMOS
Core Supply Voltage 1.2 V β€”
Internal Frequency (max) 609.76 MHz β€”
Operating Temperature Range 0C to 85C (TJ, commercial) β€”
Speed Grade C5 C5
Package 780-ball FBGA, 29 x 29 mm, 1.0 mm pitch, lead-free β€”
Mounting Type Surface Mount β€”
Configuration Method JTAG, Passive Serial, Fast Passive Parallel, Active Serial β€”
Transceivers [DATA_NEEDED: number of high-speed transceivers] β€”
RoHS Status Lead-free (per datasheets.com listing) RoHS non-compliant (per alterachips listing)
MSL Level [DATA_NEEDED: MSL rating] β€”
Series β€” Stratix II
Logic Array Blocks / ALMs β€” 4,548
Embedded RAM (Total RAM Bits) β€” 4,520,488
Embedded Multiplier / DSP Blocks β€” [DATA_NEEDED: DSP block count and 18x18 multiplier count]
User I/O Pins β€” 534
Core Voltage β€” 1.15 V to 1.25 V
Internal Operating Frequency (max) β€” 609.76 MHz
Package Type β€” 780-ball FC-FBGA (FineLine BGA)
Package Dimensions β€” 29 x 29 mm
Ball Pitch β€” 1.0 mm
Operating Temperature β€” 0 C to 85 C (Commercial)
Configuration Modes β€” Passive Serial, Fast Passive Parallel, JTAG
PLLs β€” 4 enhanced + up to 8 fast PLLs
Lead Free Status β€” [DATA_NEEDED: lead-free per JEDEC J-STD-609]

Datasheets & Resources

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