EP2SGX130GF40C4NES vs EP2SGX130GF40C3NES Comparison

Detailed side-by-side comparison of EP2SGX130GF40C4NES by Intel and EP2SGX130GF40C3NES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2SGX130GF40C4NES EP2SGX130GF40C3NES
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $1,380.00 $124.00
Family Stratix II GX Stratix II GX
Logic Elements 132,540 132540
Logic Blocks / ALMs Approximately 53,000 ALMs β€”
Process Technology 90 nm CMOS 90 nm CMOS
Core Voltage 1.2 V 1.2 V
Maximum Transceiver Data Rate 6.375 Gbps 6.375 Gbps
Transceiver Channels Up to 20 (4 to 20, device-dependent) 4 to 20 (per device family configuration)
User I/O Pins 734 β€”
Total Package Pins 1508 (FC-FBGA ball grid) β€”
Package Code GF40 (FC-FBGA, 40x40 mm, 1.0 mm pitch) β€”
Speed Grade C4 (speed grade -4) β€”
Internal Operating Frequency Up to 717 MHz β€”
Embedded Memory Approximately 4.5 Mbits (TriMatrix) β€”
PLL Blocks 8 β€”
DSP Blocks Yes (variable, see datasheet) β€”
Mounting Type Surface Mount (flip-chip BGA) Surface Mount
Lead-Free / RoHS Yes (LEAD FREE per datasheet family code) β€”
MSL Level Per JEDEC J-STD-020, typically MSL-4 or higher [DATA_NEEDED: exact MSL level] β€”
Operating Temperature Commercial Extended (per N suffix) β€”
JEDEC Standard Reference MS-034AAU-1 β€”
Logic Array Blocks (LABs) β€” 7047
Maximum Internal Frequency β€” 778.82 MHz
Transceiver Feature β€” Embedded SERDES with Clock/Data Recovery (CRU)
Memory Type β€” TriMatrix embedded memory (distributed RAM, block RAM, shift register)
Package β€” 1508-ball FC-FBGA (40 x 40 mm, 1 mm pitch)
Operating Temperature Grade β€” Commercial Extended
Terminal Form β€” Ball (BGA)
RoHS Status β€” Lead-free compliant (per package code MS-034AAU-1)
Series β€” EP2SGX130

Datasheets & Resources

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