EP2SGX130GF40C4NGB vs EP2SGX130GF40C4NES Comparison

Detailed side-by-side comparison of EP2SGX130GF40C4NGB by Intel and EP2SGX130GF40C4NES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2SGX130GF40C4NGB EP2SGX130GF40C4NES
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $640.00 $1,380.00
Series Stratix II GX β€”
Family Enhanced Configuration (EPC) Devices Stratix II GX
Logic Elements 132,540 132,540
Logic Array Blocks (LABs) 6,627 β€”
User I/O Pins 734 734
Package 1508-ball FBGA (GF40) β€”
Terminal Pitch 1.00 mm β€”
Speed Grade C4 C4 (speed grade -4)
Temperature Grade Commercial (0C to 85C) β€”
Transceivers Up to 20 multi-gigabit transceivers β€”
Max Transceiver Data Rate 6.375 Gbps β€”
PLLs 8 β€”
On-chip Memory TriMatrix memory (block RAM + distributed RAM) β€”
DSP Blocks Yes (embedded multipliers) Yes (variable, see datasheet)
Configuration Enhanced / EPC mode β€”
RoHS Status [DATA_NEEDED: RoHS status] β€”
Logic Blocks / ALMs β€” Approximately 53,000 ALMs
Process Technology β€” 90 nm CMOS
Core Voltage β€” 1.2 V
Maximum Transceiver Data Rate β€” 6.375 Gbps
Transceiver Channels β€” Up to 20 (4 to 20, device-dependent)
Total Package Pins β€” 1508 (FC-FBGA ball grid)
Package Code β€” GF40 (FC-FBGA, 40x40 mm, 1.0 mm pitch)
Internal Operating Frequency β€” Up to 717 MHz
Embedded Memory β€” Approximately 4.5 Mbits (TriMatrix)
PLL Blocks β€” 8
Mounting Type β€” Surface Mount (flip-chip BGA)
Lead-Free / RoHS β€” Yes (LEAD FREE per datasheet family code)
MSL Level β€” Per JEDEC J-STD-020, typically MSL-4 or higher [DATA_NEEDED: exact MSL level]
Operating Temperature β€” Commercial Extended (per N suffix)
JEDEC Standard Reference β€” MS-034AAU-1

Datasheets & Resources

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