EP2SGX60EF1152C5N vs EP2SGX60EF1152I4N Comparison

Detailed side-by-side comparison of EP2SGX60EF1152C5N by Intel and EP2SGX60EF1152I4N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EP2SGX60EF1152C5N EP2SGX60EF1152C5N - Stratix II GX FPGA, 60K LE, 1152-FBGA | Intel

EP2SGX60EF1152C5N - Stratix II GX FPGA, 60K LE, 1152-FBGA | Intel

EP2SGX60EF1152C5N ⚠ Last Time Buy
Intel
EP2SGX60EF1152I4N EP2SGX60EF1152I4N - 60,440-LCell FPGA, 717 MHz | Intel

EP2SGX60EF1152I4N - 60,440-LCell FPGA, 717 MHz | Intel

EP2SGX60EF1152I4N βœ“ Active

Specification Comparison

Parameter EP2SGX60EF1152C5N EP2SGX60EF1152I4N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Active
Stock Status In Stock In Stock
Unit Price (USD) $3,300.00 $0.00
Family Stratix II GX β€”
Logic Elements (LE) 60,440 β€”
Logic Array Blocks (LABs) 3022 β€”
Embedded Memory Bits 2,544,192 β€”
User I/O Count 534 β€”
Process Technology 90 nm CMOS β€”
Core Voltage 1.2 V β€”
Maximum Operating Frequency 609.76 MHz β€”
Package 1152-ball FC-FBGA 1,152-ball FBGA
Speed Grade -5 (mid) β€”
Operating Temperature Commercial (0C to +85C) β€”
Mounting Type Surface Mount (Flip-Chip BGA) Surface mount
RoHS Status [DATA_NEEDED: RoHS status] β€”
MSL Level [DATA_NEEDED: MSL level] β€”
Lead-Free [DATA_NEEDED: lead-free status] β€”
Device Type β€” FPGA
Product Family β€” Stratix II GX
Logic Cells β€” 60,440
Embedded Memory β€” 2,544,192 bits
I/O Count β€” 534
Internal Frequency β€” 717 MHz
Supply Voltage β€” 1.2 V
Package Type β€” Other, 23 x 23 mm, 1 mm pitch, MS-034AAJ-1, FBGA-484
Pins β€” 484
Device Technology β€” 90 nm
Logic Blocks β€” 3,022 LABs
Operating Temperature Grade β€” Industrial
Compliance β€” [DATA_NEEDED: compliance certification details]
Transceiver Count β€” [DATA_NEEDED: high-speed transceiver count]
Configuration Memory β€” [DATA_NEEDED: configuration memory specification]
Package Pinout β€” [DATA_NEEDED: complete ball-map pinout]

Datasheets & Resources

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