EP2SGX60EF1152I5N vs EP2SGX60FF1152 Comparison
Detailed side-by-side comparison of EP2SGX60EF1152I5N by Intel and EP2SGX60FF1152 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2SGX60EF1152I5N | EP2SGX60FF1152 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Unknown | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $1,950.00 |
| Device Type | Field Programmable Gate Array (FPGA) | β |
| Family | Stratix II GX | Stratix II GX FPGA |
| Logic Cells | 60,440 | β |
| Logic Blocks | 60,440 | β |
| Process Technology | 90 nm CMOS | 90 nm CMOS, SRAM-based |
| Core Supply Voltage | 1.2 V | β |
| Internal Frequency | 717 MHz | β |
| Reported Internal Frequency | 609.76 MHz | β |
| Maximum Clock Frequency | 622.08 MHz | β |
| Operating Temperature Range | -40 Β°C to 85 Β°C | β |
| Package | 1152-ball BGA | 1152-BBGA, FineLine BGA (FF1152) |
| Package Type | FC-FBGA | β |
| Package Dimensions | 23 x 23 mm | β |
| Terminal Pitch | 1 mm | β |
| Number of Terminals | 1152 | β |
| Terminal Form | Ball | β |
| Temperature Grade | Industrial | β |
| Propagation Delay | [DATA_NEEDED: propagation delay] | β |
| Configuration Memory | [DATA_NEEDED: configuration memory type and size] | β |
| I/O Count | [DATA_NEEDED: user I/O count] | β |
| Transceiver Count | [DATA_NEEDED: transceiver count] | β |
| RoHS Status | unknown | Compliant |
| REACH Status | unknown | β |
| Series | β | Stratix II GX |
| Logic Elements | β | 60,440 |
| Embedded Memory | β | 2,544,192 bits |
| DSP Blocks (18x18 Multipliers) | β | 192 (16 blocks) |
| Maximum User I/O | β | 364 |
| Number of LABs/CLBs | β | 3022 |
| Transceivers | β | 12 channels up to 3.125 Gbps |
| Operating Temperature | β | -40C to +85C (industrial) |
| Voltage - Supply | β | 1.2 V core / multiple VCCIO rails |
| Mounting Type | β | Surface Mount |
| Configuration Method | β | JTAG IEEE 1149.1, Serial, Passive Parallel, Fast Passive Parallel |