EP3SE260F1152I4 vs EP3SE260F1152C4 Comparison
Detailed side-by-side comparison of EP3SE260F1152I4 by Altera and EP3SE260F1152C4 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP3SE260F1152I4 - Stratix III E FPGA, 255K LE, 1152-FCBGA | Altera
EP3SE260F1152I4 β Last Time Buy
Specification Comparison
| Parameter | EP3SE260F1152I4 | EP3SE260F1152C4 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,750.00 | $8,900.00 |
| Series | Stratix III E | Stratix III E (Enhanced) |
| Manufacturer | Altera (now Intel FPGA) | β |
| Logic Elements | 255,000 | β |
| Logic Array Blocks (LABs) | 10,200 | 10,200 |
| Embedded Memory | 16,672,704 bits (16.67 Mbit) | β |
| User I/O Count | 744 | 744 |
| Package | 1152-BBGA, FCBGA | 1152-pin FC-FBGA (Flip-Chip Fine-pitch BGA) |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Operating Temperature | -40 C to +100 C (Industrial) | Commercial (0C to +85C) - inferred from speed grade C4 |
| Supply Voltage - Core | 1.1 V | β |
| Process Node | 40 nm TSMC | β |
| Configuration Memory | SRAM (volatile) | β |
| DSP Blocks (18x18 Multipliers) | 768 maximum | 384 |
| PLL Count | 12 (Enhanced) | [DATA_NEEDED: PLL count] |
| RoHS Status | Compliant | Compliant (per distributor listings) |
| MSL Level | 4 (72 hours) | β |
| Family | β | Stratix III |
| Logic Elements (LE) | β | 255,000 |
| Embedded Memory Bits | β | 16,672,768 |
| Process Technology | β | 65 nm CMOS (TSMC) |
| Core Voltage | β | 1.1 V |
| Speed Grade | β | C4 (slowest commercial grade) |
| Maximum Internal Frequency | β | ~450 MHz (per FPGAkey listing) |
| Package Code | β | BGA, square |
| I/O Standards Supported | β | LVDS, LVTTL, LVCMOS, SSTL, HSTL |
| Configuration Modes | β | Passive Serial, Fast Passive Parallel, JTAG |
| Transceivers | β | External PHY interface only (no integrated GXB) |