EP610DC-10 vs EP610DC-25 Comparison

Detailed side-by-side comparison of EP610DC-10 by Intel and EP610DC-25 by Rochester Electronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Rochester Electronics
EP610DC-25 EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester

EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester

EP610DC-25 βœ“ Active

Specification Comparison

Parameter EP610DC-10 EP610DC-25
Brand Intel Rochester Electronics
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Active
Stock Status In Stock In Stock
Unit Price (USD) $7.95 $9.95
Device Family Altera Classic EPLD β€”
Macrocells 16 16
Maximum Pipelined Data Rate 100 MHz β€”
Pin-to-Pin Propagation Delay (tpd) 10 ns β€”
Speed Grade -10 β€”
Package 24-pin CDIP (Ceramic DIP, windowed) 24-pin CDIP (Ceramic DIP, through-hole)
Mounting Type Through-Hole Through Hole
Technology CMOS, EPROM-based (UV-erasable) CMOS EPROM (UV-erasable)
Supply Voltage 5 V (single supply) β€”
Operating Temperature 0C to +70C (commercial) 0 C to +70 C
I/O Pins [DATA_NEEDED: exact I/O count for CDIP-24 variant] β€”
Logic Elements 16 macrocells (programmable AND/OR array) β€”
Configuration Memory UV-erasable EPROM β€”
Reprogrammable Yes (UV erase window on package) β€”
RoHS Status [DATA_NEEDED: not stated in verified web data] β€”
Family β€” Altera Classic EPLD
Product Type β€” EPLD (Erasable Programmable Logic Device)
Equivalent Gates β€” 300
Maximum Propagation Delay (tPD) β€” 25 ns
Pipelined Data Rate β€” Up to 100 MHz
Number of I/O Pins β€” 22
Number of Dedicated Inputs β€” 4
Total Pin Count β€” 24
Supply Voltage (VCC) β€” 4.75 V to 5.25 V (5 V nominal)
Programming Method β€” JEDEC fuse-map / UV-erase
Speed Grade Suffix β€” -25 (25 ns tPD)

Datasheets & Resources

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