EP610DC-10 vs EP610IPC-10 Comparison
Detailed side-by-side comparison of EP610DC-10 by Intel and EP610IPC-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP610DC-10
EP610DC-10 - 16-Macrocell Classic EPLD, 10ns, 24-Pin CDIP | Intel
EP610DC-10 ObsoleteAltera
EP610IPC-10
EP610IPC-10 - Classic EPLD 16-Macrocell 10ns OTP PLD | Altera
EP610IPC-10 ObsoleteSpecification Comparison
| Parameter | EP610DC-10 | EP610IPC-10 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.95 | $16.40 |
| Device Family | Altera Classic EPLD | β |
| Macrocells | 16 | 16 |
| Maximum Pipelined Data Rate | 100 MHz | β |
| Pin-to-Pin Propagation Delay (tpd) | 10 ns | β |
| Speed Grade | -10 | β |
| Package | 24-pin CDIP (Ceramic DIP, windowed) | 24-pin PDIP (Plastic DIP) |
| Mounting Type | Through-Hole | β |
| Technology | CMOS, EPROM-based (UV-erasable) | CMOS EPROM (UV-erasable / OTP) |
| Supply Voltage | 5 V (single supply) | 5 V |
| Operating Temperature | 0C to +70C (commercial) | -40C to +85C (industrial) |
| I/O Pins | [DATA_NEEDED: exact I/O count for CDIP-24 variant] | 16 |
| Logic Elements | 16 macrocells (programmable AND/OR array) | β |
| Configuration Memory | UV-erasable EPROM | β |
| Reprogrammable | Yes (UV erase window on package) | β |
| RoHS Status | [DATA_NEEDED: not stated in verified web data] | β |
| Family | β | Altera Classic EPLD |
| Device Type | β | EPLD (Erasable Programmable Logic Device) |
| Programmable Gates | β | 300 usable gates |
| Maximum Operating Frequency | β | 100 MHz |
| Propagation Delay (tPD) | β | 15 ns (commerical -10 grade) |
| Product Terms | β | 160 total |
| Dedicated Inputs | β | 4 |
| Total Input Pins | β | 20 |
| Architecture | β | Turbo-only AND-OR-NOT, PAL-type |
| Programming Method | β | Altera programming hardware (UV erase for I grade, OTP for C grade) |
| TTL Emulation | β | 100% TTL compatible |