EP610DI-35 vs EP610DC-35 Comparison
Detailed side-by-side comparison of EP610DI-35 by Intel and EP610DC-35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP610DI-35 - 16-Macrocell Classic EPLD, 35ns, 5V, 24-CDIP | Intel / Altera
EP610DI-35 ObsoleteSpecification Comparison
| Parameter | EP610DI-35 | EP610DC-35 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.85 | $18.40 |
| Family | Altera Classic EPLD | Altera Classic EP610 |
| Series | EP610 | β |
| Logic Cells / Macrocells | 16 macrocells | β |
| Usable Gates | 300 | 300 |
| Product Terms | 160 | β |
| I/O Pins | 16 bidirectional | β |
| Total Inputs | 20 (including 4 dedicated inputs) | β |
| Propagation Delay (tpd) | 35 ns | β |
| Maximum Toggle Frequency | 28.6 MHz | β |
| Internal Pipelined Data Rate | Up to 100 MHz | β |
| Supply Voltage | 5 V | β |
| Technology | CMOS, UV-erasable | β |
| Package | 24-pin CDIP (Ceramic DIP) | 24-pin CDIP (windowed CERDIP) 0.300 inch |
| Mounting Type | Through-hole | Through-Hole (DIP) |
| Operating Temperature | [DATA_NEEDED: industrial/commercial grade range] | 0C to +70C (commercial) [DATA_NEEDED: explicit range from datasheet] |
| RoHS Status | [DATA_NEEDED: not confirmed in supplied web data] | [DATA_NEEDED: not explicitly confirmed in retrieved data; CERDIP packages typically non-RoHS] |
| Device Type | β | CPLD - Classic EPLD |
| Macrocells | β | 16 |
| Propagation Delay (tPD) | β | 35 ns |
| Maximum Frequency (fMAX) | β | 28.6 MHz |
| Pipelined Data Rate | β | up to 100 MHz |
| Supply Voltage (VCC) | β | 5 V |
| Process Technology | β | CMOS |
| Program/erase Method | β | UV-erasable (windowed CERDIP) |
| Manufacturer | β | Originally Altera; today supplied via Rochester Electronics (authorized) |