EP610JI-30 vs EP610LC-35 Comparison
Detailed side-by-side comparison of EP610JI-30 by Altera and EP610LC-35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610JI-30 | EP610LC-35 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.40 | $9.95 |
| Family | Altera Classic EPLD (EP610) | Altera Classic EPLD |
| Device Type | UV Erasable Programmable Logic Device (EPLD) | β |
| Macrocells | 16 | 16 |
| Propagation Delay (tpd) | 30 ns (max) | 37 ns |
| Pipelined Data Rate | Up to 100 MHz | β |
| Product Terms | 160 | β |
| Dedicated Inputs | 4 | β |
| I/O Pins | 16 | β |
| External Clocks | 2 | β |
| Supply Voltage | 5 V (single supply) | β |
| Process Technology | CMOS | β |
| Package | CQCC28 (windowed ceramic JLCC, J-bend) | 28-pin PLCC (J-lead) |
| Package Code | JLCC-28 / CQCC28 | β |
| Erasure Method | Ultraviolet (UV) via top window | β |
| Programming | Altera Logic Programmer compatible | β |
| Operating Temperature | -40C to +85C (industrial, per EP610 family suffix convention) | Commercial (0C to +70C) [DATA_NEEDED: exact grade letter] |
| Mounting Type | Surface Mount (JLCC) | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status - vintage ceramic package, likely non-RoHS] | [DATA_NEEDED: rohs_status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead_free] |
| Device Series | β | EP610 |
| Usable Gates | β | 300 |
| Supply Voltage (Vcc) | β | 5 V |
| Technology | β | CMOS EEPROM (one-time-programmable plastic) |
| Speed Grade | β | -35 (slowest EP610) |
| Programmable Pins | β | 24 input / 16 output (shared macrocells) |
| MSL Level | β | [DATA_NEEDED: msl_level] |
| Programming Tool | β | MAX+PLUS II development system |