EP610LC-15 vs EP610DC-25 Comparison
Detailed side-by-side comparison of EP610LC-15 by Altera and EP610DC-25 by Rochester Electronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Rochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 β ActiveSpecification Comparison
| Parameter | EP610LC-15 | EP610DC-25 |
|---|---|---|
| Brand | Altera | Rochester Electronics |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.65 | $9.95 |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Family | Altera Classic EPLD (EP610) | Altera Classic EPLD |
| Logic Elements / Macrocells | 16 macrocells | β |
| Equivalent Gates | 300 gates | 300 |
| Propagation Delay (tpd) | 15 ns | β |
| Counter Frequency (fmax) | 83.3 MHz | β |
| Pipelined Data Rate | up to 100 MHz | Up to 100 MHz |
| Supply Voltage (Vcc) | 5 V (single supply) | β |
| Process Technology | CMOS | β |
| Package | 28-pin PLCC (J-lead, plastic OTP) | 24-pin CDIP (Ceramic DIP, through-hole) |
| Mounting Type | Surface Mount | Through Hole |
| Number of Pins | 28 | β |
| Operating Temperature | 0C to +70C (commercial) [DATA_NEEDED: full temperature grade] | 0 C to +70 C |
| Programming | OTP (one-time programmable) | β |
| RoHS Status | unknown | β |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| Macrocells | β | 16 |
| Maximum Propagation Delay (tPD) | β | 25 ns |
| Number of I/O Pins | β | 22 |
| Number of Dedicated Inputs | β | 4 |
| Total Pin Count | β | 24 |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V (5 V nominal) |
| Technology | β | CMOS EPROM (UV-erasable) |
| Programming Method | β | JEDEC fuse-map / UV-erase |
| Speed Grade Suffix | β | -25 (25 ns tPD) |