EP610PC-15 vs EP610PC-25T Comparison
Detailed side-by-side comparison of EP610PC-15 by Altera and EP610PC-25T by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP610PC-25T
EP610PC-25T - 16-Macrocell Classic EPLD, 25ns, PDIP-24 | Intel / Altera
EP610PC-25T β Last Time BuySpecification Comparison
| Parameter | EP610PC-15 | EP610PC-25T |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $17.50 | $28.95 |
| Family | Classic EPLD | β |
| Device Type | EPLD (Erasable Programmable Logic Device) | Erasable Programmable Logic Device (EPLD, OTP for plastic package) |
| Usable Gates | 300 gates | β |
| Macrocells | 16 | β |
| Logic Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | β |
| Maximum Counter Frequency | 100 MHz (per family datasheet) | β |
| Pipelined Data Rate | Up to 100 MHz | up to 100 MHz |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V |
| Technology | CMOS | β |
| Architecture | PAL-type, sum-of-products AND/OR array | β |
| TTL Emulation | 100% TTL compatible | β |
| Package | PDIP-24 (plastic DIP, 24-pin) | PDIP-24 (Plastic DIP, 24-pin, 0.300 in row spacing) |
| Pin Count | 24 pins | β |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0 Β°C to +70 Β°C (commercial) |
| Mounting Type | Through-Hole (DIP) | Through-hole |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Development Tool | Altera MAX+PLUS II | β |
| Logic Test Circuitry | On-board for AC/DC verification | β |
| Manufacturer | β | Intel (formerly Altera) |
| Distributor / Stocking Source | β | Rochester Electronics, LLC |
| Device Family | β | Altera Classic EPLD - EP610 |
| Logic Capacity | β | 300 usable gates |
| Macro Cells | β | 16 |
| Registers | β | 16 |
| User I/Os | β | 16 |
| Propagation Delay (tPD) | β | 25 ns (speed grade 25) |
| Maximum Toggle Frequency | β | [DATA_NEEDED: max fmax] |
| Process Technology | β | ECMOS (CMOS, EPROM-based) |
| Pinout Compatibility | β | Pin-compatible with EP610DC-25 (CERDIP-24, windowed) |
| Programming Method | β | OTP (one-time programmable) via Altera programming hardware |
| Shipping Form (T suffix) | β | Tube |