EP910IDC-15 vs EP910DC-15 Comparison
Detailed side-by-side comparison of EP910IDC-15 by Altera and EP910DC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910IDC-15 | EP910DC-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.95 | $10.75 |
| Manufacturer | Altera (now Intel PSG) | β |
| Family | Classic EPLD | Altera Classic EPLD |
| Equivalent Gates | 450 | β |
| Macrocells | 24 | 24 |
| Flip-Flops | 48 | 10 |
| Pin-to-Pin Delay (tPD) | 15 ns | β |
| Maximum Frequency (fCNT) | 66.6 MHz | β |
| Supply Voltage (VCC) | 5 V | 5 V (typical) |
| Package | 40-pin CDIP (Ceramic DIP, through-hole) | 24-pin ceramic DIP (DC) |
| Terminal Count | 40 | β |
| Terminal Form | Through-Hole | β |
| Temperature Grade | Commercial (0C to +70C) | β |
| Programmable Security Bit | Yes | β |
| On-board Test Circuitry | Yes | β |
| Logic Type | UV Erasable EPROM-based | β |
| I/O Pins | 24 | β |
| Dedicated Inputs | 10 | 12 |
| Programming Technology | EPROM (UV-erasable) | β |
| RoHS Status | non_compliant (ceramic DIP contains lead) | [DATA_NEEDED: not explicitly stated in verified data] |
| Device Density | β | 900 usable gates |
| Logic Elements | β | [DATA_NEEDED: exact LE count] |
| Bidirectional I/O Pins | β | 12 |
| Product Terms per Macrocells | β | 24 |
| Maximum Propagation Delay (tPD) | β | 15 ns |
| Speed Grade | β | 15 |
| Operating Temperature | β | 0C to +70C (commercial) |
| Technology | β | CMOS EPROM, UV-erasable |
| Mounting Type | β | Through-Hole |
| MSL Level | β | [DATA_NEEDED: MSL level] |