EP910ILC-25 vs EP910ILC-12 Comparison

Detailed side-by-side comparison of EP910ILC-25 by Intel and EP910ILC-12 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP910ILC-25 EP910ILC-12
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $9.95 $12.40
Family EP910 Classic EPLD Altera EP910 Classic EPLD
Macrocells 24 β€”
User I/O Pins 36 β€”
Propagation Delay (tPD) 25 ns 12 ns (max)
Internal Frequency (fMAX) [DATA_NEEDED: fMAX rating] β€”
Logic Blocks Sum-of-products AND/OR array β€”
Technology CMOS EPROM (UV-erasable) β€”
Configuration Memory Non-volatile EPROM (windowed ceramic) β€”
Package 44-pin JLCC (windowed ceramic) 28-PLCC (J-Lead, 11.5 x 11.5 mm)
Mounting Type Surface Mount Surface Mount
Operating Temperature -40C to +85C (industrial) -40 Β°C to +85 Β°C (industrial grade, 'I' suffix)
Supply Voltage 5 V β€”
Development Tool Altera MAX+PLUS II (legacy) β€”
RoHS Status non_compliant (ceramic windowed package) [DATA_NEEDED: RoHS status]
Lifecycle Status Obsolete - last time buy was late 1990s β€”
Product Type β€” Classic EPLD (Erasable Programmable Logic Device)
Number of Macrocells β€” 24
Usable Gates β€” 450 (typical)
Supply Voltage (VCC) β€” 4.75 V to 5.25 V
Nominal Supply β€” 5 V
Memory Technology β€” UV-erasable CMOS EPROM
Configuration Storage β€” Non-volatile EPROM (instant-on)
Programming Method β€” Altera programming algorithm (serial/parallel master-slave)
MSL Level β€” [DATA_NEEDED: MSL level]
Number of Pins β€” 28
Feedback Paths β€” 16 dedicated

Datasheets & Resources

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