EP910ILC-25 vs EP910IPC-50 Comparison
Detailed side-by-side comparison of EP910ILC-25 by Intel and EP910IPC-50 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910ILC-25 | EP910IPC-50 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.95 | $13.85 |
| Family | EP910 Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | β |
| User I/O Pins | 36 | 24 |
| Propagation Delay (tPD) | 25 ns | 50 ns |
| Internal Frequency (fMAX) | [DATA_NEEDED: fMAX rating] | β |
| Logic Blocks | Sum-of-products AND/OR array | β |
| Technology | CMOS EPROM (UV-erasable) | CMOS EPROM cell |
| Configuration Memory | Non-volatile EPROM (windowed ceramic) | β |
| Package | 44-pin JLCC (windowed ceramic) | 40-pin Ceramic DIP (IPC, windowed) |
| Mounting Type | Surface Mount | Through-Hole (DIP) |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C (industrial) |
| Supply Voltage | 5 V | β |
| Development Tool | Altera MAX+PLUS II (legacy) | β |
| RoHS Status | non_compliant (ceramic windowed package) | [DATA_NEEDED: not stated in verified data] |
| Lifecycle Status | Obsolete - last time buy was late 1990s | β |
| Product Type | β | Erasable Programmable Logic Device (EPLD) |
| Logic Capacity | β | [DATA_NEEDED: macrocell count / equivalent gates] |
| Clock-to-Output (tCO) | β | 35 ns |
| Maximum Toggle Frequency | β | [DATA_NEEDED: fMAX] |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V (5 V nominal) |
| Programming Method | β | Off-board EPROM programmer + UV erase |
| Erasure Method | β | UV light through ceramic window (IPC package) |