EP910IPC-12 vs EP910IDC-15 Comparison
Detailed side-by-side comparison of EP910IPC-12 by Altera and EP910IDC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910IPC-12 | EP910IDC-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $14.20 | $9.95 |
| Family | Classic EPLD | Classic EPLD |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | β |
| Maximum Operating Frequency (fMAX) | 76.9 MHz | β |
| Pin-to-Pin Propagation Delay (tPD) | 12 ns | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V |
| Dedicated Inputs | 10 | 10 |
| I/O Pins | 24 | 24 |
| Package | 40-pin PDIP | 40-pin CDIP (Ceramic DIP, through-hole) |
| Mounting Type | Through Hole | β |
| Technology | CMOS EPLD (UV-erasable or OTP) | β |
| Operating Temperature | -40C to +85C (industrial) | β |
| Programming Toolchain | MAX+PLUS II | β |
| Logic Capacity | Equivalent to ~24 PAL16V8s | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | non_compliant (ceramic DIP contains lead) |
| Manufacturer | β | Altera (now Intel PSG) |
| Equivalent Gates | β | 450 |
| Flip-Flops | β | 48 |
| Pin-to-Pin Delay (tPD) | β | 15 ns |
| Maximum Frequency (fCNT) | β | 66.6 MHz |
| Terminal Count | β | 40 |
| Terminal Form | β | Through-Hole |
| Temperature Grade | β | Commercial (0C to +70C) |
| Programmable Security Bit | β | Yes |
| On-board Test Circuitry | β | Yes |
| Logic Type | β | UV Erasable EPROM-based |
| Programming Technology | β | EPROM (UV-erasable) |