EP910IPC-12 vs EP910ILC-25 Comparison
Detailed side-by-side comparison of EP910IPC-12 by Altera and EP910ILC-25 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910IPC-12 | EP910ILC-25 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $14.20 | $9.95 |
| Family | Classic EPLD | EP910 Classic EPLD |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | β |
| Maximum Operating Frequency (fMAX) | 76.9 MHz | β |
| Pin-to-Pin Propagation Delay (tPD) | 12 ns | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | β |
| Dedicated Inputs | 10 | β |
| I/O Pins | 24 | β |
| Package | 40-pin PDIP | 44-pin JLCC (windowed ceramic) |
| Mounting Type | Through Hole | Surface Mount |
| Technology | CMOS EPLD (UV-erasable or OTP) | CMOS EPROM (UV-erasable) |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C (industrial) |
| Programming Toolchain | MAX+PLUS II | β |
| Logic Capacity | Equivalent to ~24 PAL16V8s | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | non_compliant (ceramic windowed package) |
| User I/O Pins | β | 36 |
| Propagation Delay (tPD) | β | 25 ns |
| Internal Frequency (fMAX) | β | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | β | Sum-of-products AND/OR array |
| Configuration Memory | β | Non-volatile EPROM (windowed ceramic) |
| Supply Voltage | β | 5 V |
| Development Tool | β | Altera MAX+PLUS II (legacy) |
| Lifecycle Status | β | Obsolete - last time buy was late 1990s |