EP910IPC-25 vs EP910IPC-50 Comparison
Detailed side-by-side comparison of EP910IPC-25 by Intel and EP910IPC-50 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910IPC-25 | EP910IPC-50 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.40 | $13.85 |
| Family | Classic EPLD (EP910 series) | Altera Classic EPLD |
| Manufacturer | Altera (now Intel) | β |
| Architecture | PAL-type EPLD, CMOS, UV/OTP | β |
| Usable Gates | 450 | β |
| Macrocells | 24 | β |
| Product Terms | 240 | β |
| Propagation Delay (tPD) | 25 ns | 50 ns |
| Maximum Frequency (fMAX) | 40 MHz | β |
| Dedicated Inputs | 12 | β |
| Bidirectional I/O Lines | 24 | β |
| Total Inputs (max) | 36 | β |
| Total Outputs (max) | 24 | β |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V (5 V nominal) |
| Operating Temperature | 0C to +70C (commercial grade) | -40C to +85C (industrial) |
| Package | 40-pin PDIP (PDIP-40) | 40-pin Ceramic DIP (IPC, windowed) |
| Mounting Type | Through-Hole | Through-Hole (DIP) |
| Programming Method | EPROM cell (OTP / UV erasable) | Off-board EPROM programmer + UV erase |
| Development Tool | MAX+PLUS II | β |
| Product Type | β | Erasable Programmable Logic Device (EPLD) |
| Logic Capacity | β | [DATA_NEEDED: macrocell count / equivalent gates] |
| Clock-to-Output (tCO) | β | 35 ns |
| Maximum Toggle Frequency | β | [DATA_NEEDED: fMAX] |
| User I/O Pins | β | 24 |
| Technology | β | CMOS EPROM cell |
| Erasure Method | β | UV light through ceramic window (IPC package) |
| RoHS Status | β | [DATA_NEEDED: not stated in verified data] |