EP910LC-35 vs EP910LC-32 Comparison
Detailed side-by-side comparison of EP910LC-35 by Altera and EP910LC-32 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC-35 | EP910LC-32 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $18.75 | $9.85 |
| Product Type | EPLD (Erasable Programmable Logic Device) | β |
| Family | Classic (EP910) | β |
| Macrocells | 24 | β |
| Usable Gates | 450 | β |
| Propagation Delay (tPD) | 35 ns | β |
| Maximum Toggle Frequency | 28.6 MHz | β |
| Supply Voltage (VCC) | 5 V | 5 V |
| Technology | CMOS EPROM | β |
| Package | PLCC-44 (J-lead, LC suffix) | PLCC-32 |
| Operating Temperature | 0C to +70C (commercial) | β |
| Pin Count | 44 | β |
| Programmable Flip-Flops | Yes (per macrocell) | β |
| Output Enable Control | Per macrocell | β |
| Erasure Method | UV (windowed) or OTP (plastic) | β |
| RoHS Status | Not applicable (legacy product) | unknown |
| Device Family | β | Altera Classic EPLD |
| Number of Macrocells | β | 24 |
| Number of Usable Gates | β | 900 gates (typical) |
| Number of Dedicated Inputs | β | 10 |
| Number of I/O Pins | β | 20 |
| Speed Grade | β | -32 |
| Maximum Toggle Frequency (fMAX) | β | [DATA_NEEDED: fMAX value in MHz for -32 grade] |
| Pin-to-Pin Propagation Delay (tPD) | β | [DATA_NEEDED: tPD in ns for -32 grade] |
| Logic Family | β | Low-power CMOS (LC suffix) |
| Programming Method | β | UV-erasable or one-time programmable (OTP for LC windowless variant) |
| Operating Temperature Range | β | [DATA_NEEDED: commercial or industrial grade] |
| I/O Standard | β | TTL-compatible |
| Mounting Type | β | Surface Mount (PLCC socket or direct solder) |
| MSL Level | β | unknown |