EP910LI-35Y vs EP910DC-30 Comparison
Detailed side-by-side comparison of EP910LI-35Y by Intel and EP910DC-30 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-35Y | EP910DC-30 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $22.75 | $15.60 |
| Family | Altera Classic EPLD | Classic EPLD (EP910 series) |
| Usable Gates | 450 | β |
| Macrocells | 24 | 24 |
| Propagation Delay (tpd) | 35 ns | β |
| Maximum Frequency (fmax) | [DATA_NEEDED: maximum toggle frequency in MHz] | β |
| Supply Voltage (VCC) | 5 V | β |
| Process Option | L (low-power CMOS) | β |
| Temperature Grade | Industrial (-40 Β°C to +85 Β°C) | β |
| Package | PLCC-44 (J-lead) | DIP-40 (through-hole, 600 mil) |
| Mounting Type | Surface Mount | Through-Hole |
| Lead Finish | Lead-free (Y suffix, RoHS-compliant) | β |
| I/O Pins | 24 | β |
| Dedicated Inputs | 36 | 36 |
| Technology | CMOS EPROM/UV-erasable | β |
| RoHS Status | Compliant (Y suffix) | β |
| Architecture | β | PAL-type AND-OR sum-of-products, CMOS |
| Gate Count | β | 900 usable gates |
| Propagation Delay (tPD) | β | 30 ns (max) |
| Clock Frequency (fCNT) | β | 33.3 MHz |
| Outputs (Macrocells) | β | 24 |
| External Clock Pins | β | 2 (CLK1, CLK2) |
| Supply Voltage | β | 5 V |
| Process Technology | β | CMOS |
| Programming Method | β | UV-Erasable / OTP |
| Operating Temperature | β | 0C to +70C (commercial) |